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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: "Woodhouse, David" <dwmw@amazon.co.uk>,
	"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Cc: "JBeulich@suse.com" <JBeulich@suse.com>
Subject: Re: [PATCH v10 09/11] x86/ctxt: Issue a speculation barrier between vcpu contexts
Date: Wed, 24 Jan 2018 13:49:07 +0000	[thread overview]
Message-ID: <58e3566d-0183-b2be-171c-ffdcae89cd34@citrix.com> (raw)
In-Reply-To: <1516800869.13558.135.camel@amazon.co.uk>

On 24/01/18 13:34, Woodhouse, David wrote:
> On Wed, 2018-01-24 at 13:12 +0000, Andrew Cooper wrote:
>> +             * Squash the domid and vcpu id together for comparason
> *comparison
>
>> +             * efficiency.  We could in principle stash and compare the struct
>> +             * vcpu pointer, but this risks a false alias if a domain has died
>> +             * and the same 4k page gets reused for a new vcpu.
>> +             */
> Isn't that also true if the domain has died and its domain-id gets re-
> used?

In principle, yes.  However, a toolstack needs to have non-default
behaviour[1] to reuse a domid without wrapping around 32k.

>
>> +            unsigned int next_id = (((unsigned int)nextd->domain_id << 16) |
>> +                                    (uint16_t)next->vcpu_id);
> I am loath to suggest *more* tweakables, but given the IBPB cost is
> there any merit in having a mode which does it only if the *domain* is
> different, regardless of vcpu_id?

This would only be a win if you were regularly cross-scheduling vcpus
from the same domain, which case you've probably other issues to be
worried about.

> If a given domain is running on HT siblings, it ought to be doing its
> own mitigation — setting STIBP for userspace if it wants, ensuring its
> own kernel is safe by having IBRS set or using retpoline, etc.

~Andrew

[1] Is this trying to be a subtle hint?

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  reply	other threads:[~2018-01-24 13:49 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-24 13:12 [PATCH v10 00/11] x86: Mitigations for SP2/CVE-2017-5715/Branch Target Injection Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 01/11] x86/cpuid: Handling of IBRS/IBPB, STIBP and IBRS for guests Andrew Cooper
2018-02-01  9:06   ` Jan Beulich
2018-02-01 13:53     ` Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 02/11] x86/msr: Emulation of MSR_{SPEC_CTRL, PRED_CMD} " Andrew Cooper
2018-01-25 12:25   ` Jan Beulich
2018-01-24 13:12 ` [PATCH v10 03/11] x86/migrate: Move MSR_SPEC_CTRL on migrate Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 04/11] x86/hvm: Permit guests direct access to MSR_{SPEC_CTRL, PRED_CMD} Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 05/11] x86/entry: Organise the use of MSR_SPEC_CTRL at each entry/exit point Andrew Cooper
2018-01-25 13:08   ` Jan Beulich
2018-01-25 14:12     ` Andrew Cooper
2018-01-25 14:36       ` Jan Beulich
2018-01-25 14:46         ` Andrew Cooper
2018-01-25 15:08           ` Jan Beulich
2018-01-25 15:10             ` Andrew Cooper
2018-01-25 16:52   ` [PATCH v11 5/11] " Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 06/11] x86/entry: Organise the clobbering of the RSB/RAS on entry to Xen Andrew Cooper
2018-01-25 13:19   ` Jan Beulich
2018-01-25 14:17     ` Andrew Cooper
2018-01-25 14:40       ` Jan Beulich
2018-01-25 14:44         ` Andrew Cooper
2018-01-25 14:48           ` Jan Beulich
2018-01-25 16:54   ` [PATCH v11 6/11] " Andrew Cooper
2018-01-26 12:17     ` Jan Beulich
2018-01-24 13:12 ` [PATCH v10 07/11] x86/entry: Avoid using alternatives in NMI/#MC paths Andrew Cooper
2018-01-25 13:43   ` Jan Beulich
2018-01-25 15:04     ` Andrew Cooper
2018-01-25 15:14       ` Jan Beulich
2018-01-25 15:19         ` Andrew Cooper
2018-01-25 16:17           ` Jan Beulich
2018-01-25 17:21   ` [PATCH v11 7/11] " Andrew Cooper
2018-01-26 12:23     ` Jan Beulich
2018-01-26 12:28       ` Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 08/11] x86/boot: Calculate the most appropriate BTI mitigation to use Andrew Cooper
2018-01-25 13:52   ` Jan Beulich
2018-02-01  8:41   ` Jan Beulich
2018-02-01 13:58     ` Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 09/11] x86/ctxt: Issue a speculation barrier between vcpu contexts Andrew Cooper
2018-01-24 13:34   ` Woodhouse, David
2018-01-24 13:49     ` Andrew Cooper [this message]
2018-01-24 14:31       ` David Woodhouse
2018-01-25 14:46         ` Konrad Rzeszutek Wilk
2018-01-25 15:57   ` Jan Beulich
2018-01-25 16:09     ` Andrew Cooper
2018-01-25 16:15       ` Andrew Cooper
2018-01-27  1:27         ` Dario Faggioli
2018-01-29  9:28           ` Jan Beulich
2018-02-05 11:37             ` George Dunlap
2018-01-25 16:31       ` Jan Beulich
2018-01-25 16:48         ` Andrew Cooper
2018-01-25 18:49       ` Dario Faggioli
2018-01-26  1:08         ` Dario Faggioli
2018-01-26  9:43           ` Jan Beulich
2018-01-26 11:13             ` Dario Faggioli
2018-01-26 11:38               ` Jan Beulich
2018-01-24 13:12 ` [PATCH v10 10/11] x86/cpuid: Offer Indirect Branch Controls to guests Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 11/11] x86/idle: Clear SPEC_CTRL while idle Andrew Cooper

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