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From: Julien Grall <julien.grall@arm.com>
To: Stefano Stabellini <sstabellini@kernel.org>
Cc: Vijay Kilari <vijay.kilari@gmail.com>,
	Manish Jaggi <mjaggi@caviumnetworks.com>,
	Andre Przywara <andre.przywara@arm.com>,
	Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
	xen-devel@lists.xenproject.org, nd@arm.com,
	Shanker Donthineni <shankerd@codeaurora.org>
Subject: Re: [PATCH v11 01/34] ARM: vGIC: avoid rank lock when reading priority
Date: Wed, 14 Jun 2017 18:44:40 +0100	[thread overview]
Message-ID: <5fd71a4e-28e1-a0bb-67c1-c7cbb19d7946@arm.com> (raw)
In-Reply-To: <alpine.DEB.2.10.1706141021580.12156@sstabellini-ThinkPad-X260>

Hi Stefano,

On 06/14/2017 06:32 PM, Stefano Stabellini wrote:
> On Wed, 14 Jun 2017, Julien Grall wrote:
>>> I don't understand your explanation. There are no PV protocols under
>>> xen/, they are implemented in other repositories. I grepped for ACCESS
>>> under xen/include/public, in case you referred to the PV protocol
>>> headers, but couldn't find anything interesting.
>>
>> Have a look at the pl011 emulation from Bhupinder. It will use plain '=' for
>> updating the PV drivers. So can you explain why it is fine there and not here?
> 
> Bhupinder's series is the first PV driver in the Xen codebase. It is
> easy to forget that coding should/might have to be different compared to
> Linux, which is the codebase I usually work with for PV drivers.
> 
> It is true that updating the indexes should be done atomically,
> otherwise the other end might end up reading a wrong index value.
> 
> 
>>>> Furthermore implementation of
>>>> atomic_read/atomic_write in Linux (both ARM and x86) is based on
>>>> WRITE_ONCE/READ_ONCE, on Xen it is a simple assignment.
>>>
>>> I don't follow why you are referring to Linux constructs in this
>>> discussion about Xen atomic functions.
>>
>> My point here is Xen and Linux are very similar. Actually a lot of the atomic
>> code is been taken from Linux (have a look to our atomic_read/atomic_write).
>>
>> As the atomic code was added the code by you (likely from Linux), I don't
>> understand why you don't complain about the atomic implementation but
>> ACCESS_ONCE.
> 
> Linux and Xen are free to make different assumptions regarding
> compilers.

It is not possible to say that Xen may have different assumptions when 
you import code from Linux without deep review (yes most of the code 
taken from Linux is as it is).

> 
> FWIW I am not really complaining about either atomics or ACCESS_ONCE, I
> just don't see the advantage of using ACCESS_ONCE over read/write_atomic
> (see below).
> 
> 
>>>> In any case, all those macros does not prevent re-ordering at the
>>>> processor
>>>> level nor read/write atomicity if the variable is misaligned.
>>>
>>> My understanding is that the unwritten assumption in Xen is that
>>> variables are always aligned. You are right about processor level
>>> reordering, in fact when needed we have to have barriers
>>>
>>> I have read Andre's well written README.atomic, and he ends the
>>> document stating the following:
>>>
>>>
>>>> This makes read and write accesses to ints and longs (and their respective
>>>> unsigned counter parts) naturally atomic.
>>>> However it would be beneficial to use atomic primitives anyway to annotate
>>>> the code as being concurrent and to prevent silent breakage when changing
>>>> the code
>>>
>>> with which I completely agree
>>
>> Which means you are happy to use either ACCESS_ONCE or
>> read_atomic/write_atomic as they in-fine exactly the same on the compiler we
>> support.
> 
> I do understand that both of them will produce the same output,
> therefore, both work for this use-case.
> 
> I don't understand why anybody would prefer ACCESS_ONCE over
> read/write_atomic, given that with ACCESS_ONCE as a contributor/reviewer
> you additionally need to remember to check whether the argument is a
> native data type. Basically, I see ACCESS_ONCE as "more work" for me.
> Why do you think that ACCESS_ONCE is "better"?

Have you looked at the implementation of ACCESS_ONCE? You don't have to 
check the data type when using ACCESS_ONCE. There are safety check to 
avoid misusing it.

What I want to avoid is this split mind we currently have about atomic.
They are either all safe or not.

As Andre suggested, we should probably import a lighter version of 
WRITE_ONCE/READ_ONCE. They are first easier to understand than 
read_atomic/write_atomic that could be confused with 
atomic_read/atomic_write (IIRC Jan agreed here).

The main goal is to avoid assembly code when it is deem not necessary.

> 
> Regarding the "compiler with support": do we state clearly in any docs
> or website what are the compilers we support? I think this would be the
> right opportunity to do it.

That's a discussion to have on the README.atomics patch.

Cheers,

-- 
Julien Grall

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  reply	other threads:[~2017-06-14 17:44 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-09 17:41 [PATCH v11 00/34] arm64: Dom0 ITS emulation Andre Przywara
2017-06-09 17:41 ` [PATCH v11 01/34] ARM: vGIC: avoid rank lock when reading priority Andre Przywara
2017-06-12 14:49   ` Julien Grall
2017-06-12 22:34     ` Stefano Stabellini
2017-06-13  9:01       ` Julien Grall
2017-06-13 22:19         ` Stefano Stabellini
2017-06-14  8:55           ` Julien Grall
2017-06-14 11:22             ` Andre Przywara
2017-06-14 11:27               ` Julien Grall
2017-06-14 17:32             ` Stefano Stabellini
2017-06-14 17:44               ` Julien Grall [this message]
2017-06-14 18:15                 ` Stefano Stabellini
2017-06-14 18:32                   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 02/34] ARM: GICv3: enable ITS on the host Andre Przywara
2017-06-12 14:51   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 03/34] ARM: GICv3: enable LPIs " Andre Przywara
2017-06-09 17:41 ` [PATCH v11 04/34] ARM: GICv3: setup number of LPI bits for a GICv3 guest Andre Przywara
2017-06-12 15:03   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 05/34] ARM: vGIC: rework gic_remove_from_queues() Andre Przywara
2017-06-12 15:15   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 06/34] ARM: vGIC: move irq_to_pending() calls under the VGIC VCPU lock Andre Przywara
2017-06-12 15:22   ` Julien Grall
2017-06-12 22:43     ` Stefano Stabellini
2017-06-09 17:41 ` [PATCH v11 07/34] ARM: vGIC: introduce gic_remove_irq() Andre Przywara
2017-06-12 15:28   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 08/34] ARM: GIC: Add checks for NULL pointer pending_irq's Andre Przywara
2017-06-12 15:30   ` Julien Grall
2017-06-12 22:44   ` Stefano Stabellini
2017-06-09 17:41 ` [PATCH v11 09/34] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-06-09 17:41 ` [PATCH v11 10/34] ARM: GIC: export and extend vgic_init_pending_irq() Andre Przywara
2017-06-12 15:36   ` Julien Grall
2017-06-14 15:54     ` Andre Przywara
2017-06-14 16:33       ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 11/34] ARM: vGIC: cache virtual LPI priority in struct pending_irq Andre Przywara
2017-06-12 15:39   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 12/34] ARM: vGIC: add LPI VCPU ID to " Andre Przywara
2017-06-12 15:46   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 13/34] ARM: GIC: ITS: remove no longer needed VCPU ID in host LPI entry Andre Przywara
2017-06-12 15:47   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 14/34] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-06-12 15:53   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 15/34] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-06-09 17:41 ` [PATCH v11 16/34] ARM: introduce vgic_access_guest_memory() Andre Przywara
2017-06-09 17:41 ` [PATCH v11 17/34] ARM: vGICv3: re-use vgic_reg64_check_access Andre Przywara
2017-06-09 17:41 ` [PATCH v11 18/34] ARM: vGIC: advertise LPI support Andre Przywara
2017-06-12 16:02   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 19/34] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-06-12 16:04   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 20/34] ARM: vITS: introduce translation table walks Andre Przywara
2017-06-12 16:07   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 21/34] ARM: vITS: provide access to struct pending_irq Andre Przywara
2017-06-09 17:41 ` [PATCH v11 22/34] ARM: vITS: handle INT command Andre Przywara
2017-06-09 17:41 ` [PATCH v11 23/34] ARM: vITS: handle MAPC command Andre Przywara
2017-06-09 17:41 ` [PATCH v11 24/34] ARM: vITS: handle CLEAR command Andre Przywara
2017-06-12 16:19   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 25/34] ARM: vITS: handle MAPD command Andre Przywara
2017-06-13 22:02   ` Stefano Stabellini
2017-06-09 17:41 ` [PATCH v11 26/34] ARM: GICv3: handle unmapped LPIs Andre Przywara
2017-06-12 16:30   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 27/34] ARM: vITS: handle MAPTI/MAPI command Andre Przywara
2017-06-12 16:36   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 28/34] ARM: vITS: handle MOVI command Andre Przywara
2017-06-12 16:37   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 29/34] ARM: vITS: handle DISCARD command Andre Przywara
2017-06-09 17:41 ` [PATCH v11 30/34] ARM: vITS: handle INV command Andre Przywara
2017-06-09 17:41 ` [PATCH v11 31/34] ARM: vITS: handle INVALL command Andre Przywara
2017-06-12 16:41   ` Julien Grall
2017-06-09 17:41 ` [PATCH v11 32/34] ARM: vITS: increase mmio_count for each ITS Andre Przywara
2017-06-09 17:41 ` [PATCH v11 33/34] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2017-06-09 17:41 ` [PATCH v11 34/34] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2017-06-12  5:04 ` [PATCH v11 00/34] arm64: Dom0 ITS emulation Manish Jaggi

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