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From: Andrii Anisov <andrii_anisov@epam.com>
To: Julien Grall <julien.grall@arm.com>,
	Andrii Anisov <andrii.anisov@gmail.com>,
	xen-devel@lists.xen.org
Cc: Iurii Konovalenko <iurii.konovalenko@globallogic.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Iurii Mykhalskyi <iurii.mykhalskyi@globallogic.com>
Subject: Re: [PATCH 1/2] xen:arm64: Add SCIF UART support for earlyprintk
Date: Wed, 26 Jul 2017 18:39:54 +0300	[thread overview]
Message-ID: <60a5bae9-fbe8-eb8b-cd0c-b347ebaa5f87@epam.com> (raw)
In-Reply-To: <625cd8c4-4f3e-9747-8549-02b9b074ae70@arm.com>

Hello Julien,

On 26.07.17 18:33, Julien Grall wrote:
>
>
> On 26/07/17 16:25, Andrii Anisov wrote:
>> + Stefano as a maintainer.
>>
>> Dear all,
>>
>> Any objections on this patch?
>
> I would have appreciated to be CC as well...
Somewhy I though you are in the thread of this patch as well.
Sorry for my miss.

> >
>>
>> On 05.07.17 19:29, Andrii Anisov wrote:
>>> From: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
>>>
>>> Add support for a SCIF compatible UART found in Renesas R-Car Gen3 
>>> SoCs.
>>>
>>> Signed-off-by: Iurii Konovalenko <iurii.konovalenko@globallogic.com>
>>> Signed-off-by: Iurii Mykhalskyi <iurii.mykhalskyi@globallogic.com>
>>> Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
>>> ---
>>>   xen/arch/arm/arm64/debug-scif.inc | 51
>>> +++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 51 insertions(+)
>>>   create mode 100644 xen/arch/arm/arm64/debug-scif.inc
>>>
>>> diff --git a/xen/arch/arm/arm64/debug-scif.inc
>>> b/xen/arch/arm/arm64/debug-scif.inc
>>> new file mode 100644
>>> index 0000000..1f4d657
>>> --- /dev/null
>>> +++ b/xen/arch/arm/arm64/debug-scif.inc
>>> @@ -0,0 +1,51 @@
>>> +/*
>>> + * xen/arch/arm/arm64/debug-scif.inc
>>> + *
>>> + * SCIF specific debug code
>>> + *
>>> + * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
>>> + * Iurii Konovalenko <iurii.konovalenko@globallogic.com>
>>> + * Iurii Mykhalskyi <iurii.mykhalskyi@globallogic.com>
>>> + * Copyright (C) 2014-2016, Globallogic.
>>> + *
>>> + * This program is free software; you can redistribute it and/or 
>>> modify
>>> + * it under the terms of the GNU General Public License as 
>>> published by
>>> + * the Free Software Foundation; either version 2 of the License, or
>>> + * (at your option) any later version.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>> + * GNU General Public License for more details.
>>> + */
>>> +
>>> +#include <asm/scif-uart.h>
>>> +
>>> +/* SCIF UART wait UART to be ready to transmit
>
> Coding style.
>
>>> + * rb: register which contains the UART base address
>
> Wrong name
>
>>> + * rc: scratch register
>
> Ditto
>
>>> + */
>>> +.macro early_uart_ready xb c
>>> +1:
>>> +        ldrh   w\c, [\xb, #SCIF_SCFSR]   /* <- SCFSR (status
>>> register) */
>>> +        tst    w\c, #SCFSR_TDFE          /* Check TDFE bit */
>>> +        beq    1b                        /* Wait for the UART to be
>>> ready */
>>> +.endm
>>> +
>>> +/* SCIF UART transmit character
>
> Ditto
>
>>> + * rb: register which contains the UART base address
>
> Ditto
>
>>> + * rt: register which contains the character to transmit
>
> Ditto
>
>>> + */
>>> +.macro early_uart_transmit xb wt
>>> +        strb   \wt, [\xb, #SCIF_SCFTDR]                  /* -> SCFTDR
>>> (data register) */
>>> +        ldrh   \wt, [\xb, #SCIF_SCFSR]                   /* <- SCFSR
>>> (status register) */
>>> +        and    \wt, \wt, #(~(SCFSR_TEND | SCFSR_TDFE))   /* Clear
>>> TEND and TDFE bits */
>>> +        strh   \wt, [\xb, #SCIF_SCFSR]                   /* -> SCFSR
>>> (status register) */
>>> +.endm
>>> +
>>> +/*
>>> + * Local variables:
>>> + * mode: ASM
>>> + * indent-tabs-mode: nil
>>> + * End:
>>> + */
>>
>
> Cheers,
>
Yep, will cleanup.

-- 

*Andrii Anisov*



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  reply	other threads:[~2017-07-26 15:39 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-05 16:29 Renesas R-Car Gen3 SoCs earlyprintk support Andrii Anisov
2017-07-05 16:29 ` [PATCH 1/2] xen:arm64: Add SCIF UART support for earlyprintk Andrii Anisov
2017-07-26 15:25   ` Andrii Anisov
2017-07-26 15:33     ` Julien Grall
2017-07-26 15:39       ` Andrii Anisov [this message]
2017-07-05 16:29 ` [PATCH 2/2] xen:arm: earlyprintk configuration for R-Car Gen3 boards Andrii Anisov
2017-07-26 15:25   ` Andrii Anisov
2017-07-26 15:34     ` Julien Grall
2017-07-05 16:34 ` Renesas R-Car Gen3 SoCs earlyprintk support Julien Grall
2017-07-05 16:41   ` Andrii Anisov
2017-07-05 16:50     ` Julien Grall
2017-07-05 17:00       ` Andrii Anisov
2017-07-05 17:18         ` Julien Grall
2017-07-06 11:31           ` Andrii Anisov
2017-07-06 11:43             ` Julien Grall
2017-07-06 12:24               ` Andrii Anisov
2017-07-06 12:35                 ` Julien Grall
2017-07-07 10:47                   ` Andrii Anisov
2017-07-07 10:55                     ` Julien Grall
2017-07-07 12:11                       ` Andrii Anisov
2017-07-14 17:00       ` Andrii Anisov

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