From: Julien Grall <julien.grall@linaro.org>
To: mjaggi@caviumnetworks.com, xen-devel@lists.xen.org,
marc.zyngier@arm.com, sstabellini@kernel.org,
andre.przywara@linaro.org
Cc: manish.jaggi@cavium.com
Subject: Re: [RFC PATCH 01/10] Add CONFIG_VGIC_ERRATA
Date: Thu, 25 Jan 2018 13:48:29 +0000 [thread overview]
Message-ID: <79eeb426-0519-08f3-88a6-b795b9a2f68e@linaro.org> (raw)
In-Reply-To: <20180116154305.19186-2-mjaggi@caviumnetworks.com>
Hi Manish,
On 16/01/18 15:42, mjaggi@caviumnetworks.com wrote:
> From: Manish Jaggi <manish.jaggi@cavium.com>
>
> Add a config option to enable VGIC Errata Code in Xen. Platforms which do not
> have this errta can compile out this feature.
s/errta/errata/
>
> Signed-off-by: Manish Jaggi <manish.jaggi@cavium.com>
> ---
> xen/arch/arm/Kconfig | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
> index f58019d6ed..2966e3a3d3 100644
> --- a/xen/arch/arm/Kconfig
> +++ b/xen/arch/arm/Kconfig
> @@ -59,6 +59,15 @@ config SBSA_VUART_CONSOLE
>
> endmenu
>
> +menu "Errata Workarounds"
> + depends on ARM_64
I would much prefer to see the memu "ARM errata workaround via..."
renamed to "Errata Workarounds". So we have only one menu with all
workarounds.
> +
> +config VGIC_ERRATA
> + bool "Handler code for emulation of Group0/1 vGIC registers for VGC Errata"
The title does not help the user to know when to select this option or not.
It looks like to me you want to do something similar to commit
690a341577f9 "arm64: Add workaround for Cavium Thunder erratum 30115" in
Linux where the config is called CAVIUM_ERRATA_30115 and a proper
description explaining the platform affected.
> + depends on ARM_64
I think this should depend on HAS_GICV3.
> +
> +endmenu
> +
> menu "ARM errata workaround via the alternative framework"
> depends on HAS_ALTERNATIVE
>
>
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2018-01-25 13:48 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-16 15:42 [RFC PATCH 00/10] arm64: Mediate access to GICv3 sysregs at EL2 mjaggi
2018-01-16 15:42 ` [RFC PATCH 01/10] Add CONFIG_VGIC_ERRATA mjaggi
2018-01-25 13:48 ` Julien Grall [this message]
2018-02-21 15:17 ` Manish Jaggi
2018-02-21 15:56 ` Julien Grall
2018-01-16 15:42 ` [RFC PATCH 02/10] arm64: Add hook to handle guest GICv3 sysreg accesses mjaggi
2018-01-25 16:17 ` Julien Grall
2018-01-25 18:07 ` Julien Grall
2018-02-01 8:51 ` Manish Jaggi
2018-02-01 10:54 ` Julien Grall
2018-02-26 6:42 ` Manish Jaggi
2018-02-26 6:58 ` Manish Jaggi
2018-02-26 10:43 ` Julien Grall
2018-01-16 15:42 ` [PATCH 03/10] arm64: Add ICV_BPR1_EL1 handler mjaggi
2018-01-25 16:44 ` Julien Grall
2018-02-01 8:57 ` Manish Jaggi
2018-02-01 10:55 ` Julien Grall
2018-01-16 15:42 ` [PATCH 04/10] arm64: Add ICV_IGRPEN1_EL1 handler mjaggi
2018-01-16 15:43 ` [PATCH 05/10] arm64: Add accessors for the ICH_APxRn_EL2 registers mjaggi
2018-01-16 15:43 ` [PATCH 06/10] Expose gicv3_ich_read/write_lr mjaggi
2018-01-25 16:52 ` Julien Grall
2018-02-01 8:54 ` Manish Jaggi
2018-01-16 15:43 ` [PATCH 07/10] arm64: Add ICV_IAR1_EL1 handler mjaggi
2018-01-16 15:43 ` [PATCH 08/10] Add ICV_EOIR1_EL1 handler mjaggi
2018-01-16 15:43 ` [PATCH 09/10] arm64: Add a handler for ICV_HPPIR1_EL1 mjaggi
2018-01-16 15:43 ` [PATCH 10/10] Enable Trapping of Group1 registers which is controlled by command line mjaggi
2018-01-25 17:00 ` Julien Grall
2018-02-01 8:53 ` Manish Jaggi
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