Re: [PATCH 06/10] Expose gicv3_ich_read/write_lr

[Julien Grall <julien.grall@linaro.org>]

Hi,

On 16/01/18 15:43, mjaggi@caviumnetworks.com wrote:
> From: Manish Jaggi <manish.jaggi@cavium.com>
> 
> gicv3_ich_read/write_lr functions are static in gic-v3.c
> This patch creates wrapper functions which can be used from outside the file.
> 
> Signed-off-by: Manish Jaggi <manish.jaggi@cavium.com>
> ---
>   xen/arch/arm/gic-v3.c        | 10 ++++++++++
>   xen/include/asm-arm/gic_v3.h |  7 +++++++
>   2 files changed, 17 insertions(+)
> 
> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
> index 473e26111f..5dba8bc932 100644
> --- a/xen/arch/arm/gic-v3.c
> +++ b/xen/arch/arm/gic-v3.c
> @@ -184,6 +184,11 @@ static uint64_t gicv3_ich_read_lr(int lr)
>       }
>   }
>   
> +uint64_t __gicv3_ich_read_lr(int lr)

I see no reason to have a wrapper with exactly the same parameters. Just 
export the current one.

But I think I would prefer the function to be redefined in the cpu if 
implementation. So we vGIC errata is fully separated from the rest of Xen.

> +{
> +    return gicv3_ich_read_lr(lr);
> +}
> +
>   static void gicv3_ich_write_lr(int lr, uint64_t val)
>   {
>       switch ( lr )
> @@ -242,6 +247,11 @@ static void gicv3_ich_write_lr(int lr, uint64_t val)
>       isb();
>   }
>   
> +void __gicv3_ich_write_lr(int lr, uint64_t val)
> +{
> +    return gicv3_ich_write_lr(lr, val);
> +}
> +
>   /*
>    * System Register Enable (SRE). Enable to access CPU & Virtual
>    * interface registers as system registers in EL2
> diff --git a/xen/include/asm-arm/gic_v3.h b/xen/include/asm-arm/gic_v3.h
> new file mode 100644
> index 0000000000..544aad5932
> --- /dev/null
> +++ b/xen/include/asm-arm/gic_v3.h
> @@ -0,0 +1,7 @@
> +#ifndef GICV3_H
> +#define GICV3_H
> +
> +uint64_t __gicv3_ich_read_lr(int lr);
> +void __gicv3_ich_write_lr(int lr, uint64_t val);
> +
> +#endif
> 

Cheers,

-- 
Julien Grall

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