From: Julien Grall <julien.grall@arm.com>
To: Stefano Stabellini <sstabellini@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Steve Capper <Steve.Capper@arm.com>,
Jan Beulich <JBeulich@suse.com>,
Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH 2/4] xen/x86: Drop erronious barriers
Date: Wed, 7 Dec 2016 18:55:21 +0000 [thread overview]
Message-ID: <8ef7891c-5903-fa04-bf32-c1cd9c29a78c@arm.com> (raw)
In-Reply-To: <alpine.DEB.2.10.1612071039590.22778@sstabellini-ThinkPad-X260>
On 07/12/2016 18:44, Stefano Stabellini wrote:
> On Wed, 7 Dec 2016, Julien Grall wrote:
> Andrew thinks that (on x86) there is actually nothing that CPU0 will be
> looking at, that has been set by CPU1. However looking at the code it is
> difficult to verify. There are many cpu notifiers and many things
> written by start_secondary. I would prefer to submit this patch, and be
> safe.
I agree on this. Better be safe than hunting a bug later on.
Although, I think I just found an example for ARM. The gic_cpu_id (see
gic-v2.c) is stored per-cpu and initialized by each CPU at boot.
gic_cpu_id is commonly used to send a SGI to a specific target. So we
need to ensure that CPU0 will see this value before sending an SGI (see
gicv2_send_SGI). Otherwise the SGI may go to the wild.
While you are sending a patch, can you document in the code why the
barrier is present?
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2016-12-07 18:55 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-05 10:05 [PATCH 0/4] Fixes to common and x86 barriers Andrew Cooper
2016-12-05 10:05 ` [PATCH 1/4] xen/common: Replace incorrect mandatory barriers with SMP barriers Andrew Cooper
2016-12-05 10:55 ` Jan Beulich
2016-12-05 19:07 ` Stefano Stabellini
2016-12-05 10:05 ` [PATCH 2/4] xen/x86: Drop erronious barriers Andrew Cooper
2016-12-05 11:18 ` Jan Beulich
2016-12-05 11:25 ` Andrew Cooper
2016-12-05 12:28 ` Jan Beulich
2016-12-05 13:43 ` Andrew Cooper
2016-12-05 13:50 ` Jan Beulich
2016-12-05 13:59 ` Andrew Cooper
2016-12-05 14:07 ` Jan Beulich
2016-12-05 19:14 ` Stefano Stabellini
2016-12-05 19:17 ` Stefano Stabellini
2016-12-06 0:10 ` Andrew Cooper
2016-12-06 20:27 ` Stefano Stabellini
2016-12-06 20:32 ` Stefano Stabellini
2016-12-07 1:03 ` Andrew Cooper
2016-12-07 1:20 ` Stefano Stabellini
2016-12-07 1:46 ` Andrew Cooper
2016-12-07 18:31 ` Julien Grall
2016-12-07 18:44 ` Stefano Stabellini
2016-12-07 18:55 ` Julien Grall [this message]
2016-12-05 10:05 ` [PATCH 3/4] xen/x86: Replace incorrect mandatory barriers with SMP barriers Andrew Cooper
2016-12-05 11:47 ` Jan Beulich
2016-12-05 13:29 ` Andrew Cooper
2016-12-05 14:03 ` Jan Beulich
2016-12-05 14:24 ` Andrew Cooper
2016-12-05 14:33 ` Jan Beulich
2016-12-05 10:05 ` [PATCH 4/4] xen/x86: Correct mandatory and SMP barrier definitions Andrew Cooper
2016-12-05 10:11 ` Juergen Gross
2016-12-05 13:45 ` Andrew Cooper
2016-12-05 11:51 ` Jan Beulich
2016-12-05 14:08 ` Andrew Cooper
2016-12-05 12:01 ` David Vrabel
2016-12-05 13:46 ` Andrew Cooper
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