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From: Andre Przywara <andre.przywara@linaro.org>
To: Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	xen-devel@lists.xenproject.org
Subject: Re: [RFC PATCH 38/49] ARM: new VGIC: handle hardware mapped IRQs
Date: Mon, 26 Feb 2018 16:48:14 +0000	[thread overview]
Message-ID: <93e4fb8b-8ed9-0352-078a-45c030b08874@linaro.org> (raw)
In-Reply-To: <d57d0e83-e8ea-101a-c332-63414f3c2945@arm.com>

Hi,

On 23/02/18 18:14, Julien Grall wrote:
> 
> 
> On 23/02/18 18:02, Andre Przywara wrote:
>> Hi,
> 
> Hi Andre,
> 
>> On 19/02/18 12:19, Julien Grall wrote:
>>> Hi,
>>>
>>> On 09/02/18 14:39, Andre Przywara wrote:
>>>> The VGIC supports virtual IRQs to be connected to a hardware IRQ, so
>>>> when a guest EOIs the virtual interrupt, it affects the state of that
>>>> corresponding interrupt on the hardware side at the same time.
>>>> Implement the interface that the Xen arch/core code expects to connect
>>>> the virtual and the physical world.
>>>>
>>>> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
>>>> ---
>>>>    xen/arch/arm/vgic/vgic.c | 63
>>>> ++++++++++++++++++++++++++++++++++++++++++++++++
>>>>    1 file changed, 63 insertions(+)
>>>>
>>>> diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c
>>>> index dc5e011fa3..8d5260a7db 100644
>>>> --- a/xen/arch/arm/vgic/vgic.c
>>>> +++ b/xen/arch/arm/vgic/vgic.c
>>>> @@ -693,6 +693,69 @@ void vgic_kick_vcpus(struct domain *d)
>>>>        }
>>>>    }
>>>>    +struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu
>>>> *v,
>>>> +                                      unsigned int virq)
>>>> +{
>>>> +    struct irq_desc *desc = NULL;
>>>> +    struct vgic_irq *irq = vgic_get_irq(d, v, virq);
>>>> +    unsigned long flags;
>>>> +
>>>> +    if ( !irq )
>>>> +        return NULL;
>>>> +
>>>> +    spin_lock_irqsave(&irq->irq_lock, flags);
>>>> +    if ( irq->hw )
>>>> +        desc = irq_to_desc(irq->hwintid);
>>>
>>> This is not going to work well for PPIs. We should consider to add at
>>> least an ASSERT(...) in the code to prevent bad use of it.
>>
>> Yeah, done. But I wonder if we eventually should extend the
>> irq_to_desc() function to take the vCPU, since we will need it anyway
>> once we use hardware mapped timer IRQs (PPIs) in the future. But this
>> should not be in this series, I guess.
> 
> irq_to_desc only deal with hardware interrupt, so you mean pCPU instead
> of vCPU?

Yes, indeed. But I think this points to the problem of this approach:
the virtual IRQ is tied to a VCPU, and we have to make sure that not
only the affinity is updated on a CPU migration (as we do for SPIs), but
actually the interrupt itself is changed: since CPU0/PPI9 has a
different irq_desc* from, say, CPU1/PPI9.
So there is more than just adding a parameter to irq_to_desc().

>>>> +    spin_unlock_irqrestore(&irq->irq_lock, flags);
>>>> +
>>>> +    vgic_put_irq(d, irq);
>>>> +
>>>> +    return desc;
>>>> +}
>>>> +
>>>> +/*
>>>> + * was:
>>>> + *      int kvm_vgic_map_phys_irq(struct vcpu *vcpu, u32 virt_irq,
>>>> u32 phys_irq)
>>>> + *      int kvm_vgic_unmap_phys_irq(struct vcpu *vcpu, unsigned int
>>>> virt_irq)
>>>> + */
>>>> +int vgic_connect_hw_irq(struct domain *d, struct vcpu *vcpu,
>>>> +            unsigned int virt_irq, struct irq_desc *desc,
>>>> +            bool connect)
>>>
>>> Indentation.
>>>
>>>> +{
>>>> +    struct vgic_irq *irq = vgic_get_irq(d, vcpu, virt_irq);
>>>> +    unsigned long flags;
>>>> +    int ret = 0;
>>>> +
>>>> +    if ( !irq )
>>>> +        return -EINVAL;
>>>> +
>>>> +    spin_lock_irqsave(&irq->irq_lock, flags);
>>>> +
>>>> +    if ( connect )                      /* assign a mapped IRQ */
>>>> +    {
>>>> +        /* The VIRQ should not be already enabled by the guest */
>>>> +        if ( !irq->hw && !irq->enabled )
>>>> +        {
>>>> +            irq->hw = true;
>>>> +            irq->hwintid = desc->irq;
>>>> +        }
>>>> +        else
>>>> +        {
>>>> +            ret = -EBUSY;
>>>> +        }
>>>
>>> I know that it should not matter for SPIs today. But aren't you meant to
>>> get a reference on that interrupt if you connect it?
>>
>> No, the refcount feature is strictly for the pointer to the structure,
>> not for everything related to this virtual IRQ.
>> We store only the virtual IRQ number in the dev_id/info members, we will
>> get the struct vgic_irq pointer via the vIRQ number on do_IRQ().
>> Does that make sense?
> 
> But technically you "allocate" the virtual SPI at that time, right? So
> this would mean you need to get a reference, otherwise it might disappear.

We will realise that is has disappeared when vgic_get_irq() called with
that virtual number returns NULL. The refcount is really just to know
when you can free dynamically allocated struct vgic_irqs, so it's
strictly about the *pointer* to the *memory*, not about the logical
entity of that particular virtual IRQ.
Actually it should not really happen that you end up with a hardware IRQ
still assigned to an abandoned virtual IRQ, as you would expect to free
that connection *before* disbanding the virtual IRQ.

> So I am not entirely sure why the reference is not necessary here.

Typically to remove a virtual IRQ, you arrange for vgic_get_irq() to
return NULL on that number. Then you "wait" for the refcount to drop to
zero, at which point it's safe to free the memory allocated for that
vgic_irq. As mentioned, only really useful for LPIs, but it's a central
property of the new VGIC architecture, because we need to have those
gets/puts in virtually every function.

Cheers,
Andre.

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  reply	other threads:[~2018-02-26 16:48 UTC|newest]

Thread overview: 154+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-09 14:38 [RFC PATCH 00/49] New VGIC(-v2) implementation Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 01/49] tools: ARM: vGICv3: avoid inserting optional DT properties Andre Przywara
2018-02-09 19:14   ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 02/49] ARM: vGICv3: drop GUEST_GICV3_RDIST_REGIONS symbol Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 03/49] ARM: GICv3: use hardware GICv3 redistributor regions for Dom0 Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 04/49] ARM: GICv3: simplify GICv3 redistributor stride handling Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 05/49] ARM: vGICv3: always use architected redist stride Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 06/49] ARM: vGICv3: remove rdist_stride from VGIC structure Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 07/49] ARM: VGIC: move gic_remove_from_lr_pending() prototype Andre Przywara
2018-02-09 19:15   ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 08/49] ARM: VGIC: move max_vcpus VGIC limit to struct arch_domain Andre Przywara
2018-02-09 19:27   ` Julien Grall
2018-02-28 12:32     ` Andre Przywara
2018-02-28 13:04       ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 09/49] ARM: VGIC: change to level-IRQ compatible IRQ injection interface Andre Przywara
2018-02-12 11:15   ` Julien Grall
2018-02-12 11:59     ` Andre Przywara
2018-02-12 12:19       ` Julien Grall
2018-02-12 14:24         ` Andre Przywara
2018-02-13 11:49           ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 10/49] ARM: VGIC: carve out struct vgic_cpu and struct vgic_dist Andre Przywara
2018-02-12 11:19   ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 11/49] ARM: VGIC: reorder prototypes in vgic.h Andre Przywara
2018-02-12 11:53   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 12/49] ARM: VGIC: introduce gic_get_nr_lrs() Andre Przywara
2018-02-12 11:57   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 13/49] ARM: VGIC: Add hypervisor base address to vgic_v2_setup_hw() Andre Przywara
2018-02-12 12:07   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 14/49] ARM: VGIC: extend GIC CPU interface definitions Andre Przywara
2018-02-12 12:34   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 15/49] ARM: GIC: Allow tweaking the active state of an IRQ Andre Przywara
2018-02-12 13:55   ` Julien Grall
2018-02-12 17:53     ` Andre Przywara
2018-02-13 12:02       ` Julien Grall
2018-02-13 15:01         ` Andre Przywara
2018-02-16 15:07           ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 16/49] ARM: GIC: allow reading pending state of a hardware IRQ Andre Przywara
2018-02-12 14:00   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 17/49] ARM: timer: Handle level triggered IRQs correctly Andre Przywara
2018-02-12 15:19   ` Julien Grall
2018-02-12 18:23     ` Andre Przywara
2018-02-13 12:05       ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 18/49] ARM: evtchn: " Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 19/49] ARM: vPL011: Use the VGIC's level triggered IRQs handling if available Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 20/49] ARM: new VGIC: Add data structure definitions Andre Przywara
2018-02-12 16:42   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 21/49] ARM: new VGIC: Add acccessor to new struct vgic_irq instance Andre Przywara
2018-02-12 17:42   ` Julien Grall
2018-02-13 11:18     ` Andre Przywara
2018-02-16 15:16       ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 22/49] ARM: new VGIC: Implement virtual IRQ injection Andre Przywara
2018-02-12 18:59   ` Julien Grall
2018-02-27 10:17     ` Andre Przywara
2018-02-27 10:43       ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 23/49] ARM: new VGIC: Add IRQ sorting Andre Przywara
2018-02-13 12:30   ` Julien Grall
2018-02-13 14:56     ` Andre Przywara
2018-02-13 15:00       ` Julien Grall
2018-02-13 16:21       ` Christoffer Dall
2018-02-09 14:39 ` [RFC PATCH 24/49] ARM: new VGIC: Add IRQ sync/flush framework Andre Przywara
2018-02-13 12:41   ` Julien Grall
2018-02-13 15:40     ` Andre Przywara
2018-02-16 15:22       ` Julien Grall
2018-02-13 14:31   ` Julien Grall
2018-02-13 14:56     ` Andre Przywara
2018-02-13 15:01       ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 25/49] ARM: new VGIC: Add GICv2 world switch backend Andre Przywara
2018-02-13 14:31   ` Julien Grall
2018-02-26 15:13     ` Andre Przywara
2018-02-26 16:02       ` Julien Grall
2018-02-26 16:19         ` Andre Przywara
2018-02-26 15:16     ` Andre Przywara
2018-02-26 15:59       ` Julien Grall
2018-02-26 16:23         ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 26/49] ARM: new VGIC: Implement vgic_vcpu_pending_irq Andre Przywara
2018-02-13 16:35   ` Julien Grall
2018-02-13 16:36     ` Julien Grall
2018-02-26 15:29     ` Andre Przywara
2018-02-26 15:55       ` Julien Grall
2018-02-26 16:25         ` Andre Przywara
2018-02-26 16:30           ` Julien Grall
2018-03-02 13:53             ` Andre Przywara
2018-03-02 13:58               ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 27/49] ARM: new VGIC: Add MMIO handling framework Andre Przywara
2018-02-13 16:52   ` Julien Grall
2018-02-13 18:17     ` Andre Przywara
2018-02-16 15:25       ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 28/49] ARM: new VGIC: Add GICv2 " Andre Przywara
2018-02-16 15:39   ` Julien Grall
2018-02-19 12:23     ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 29/49] ARM: new VGIC: Add CTLR, TYPER and IIDR handlers Andre Przywara
2018-02-16 15:56   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 30/49] ARM: new VGIC: Add ENABLE registers handlers Andre Przywara
2018-02-16 16:57   ` Julien Grall
2018-02-19 12:41     ` Andre Przywara
2018-02-19 14:13       ` Julien Grall
2018-02-27 13:54         ` Andre Przywara
2018-02-27 14:34           ` Julien Grall
2018-02-23 15:18     ` Andre Przywara
2018-02-26 11:20       ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 31/49] ARM: new VGIC: Add PENDING " Andre Przywara
2018-02-16 17:16   ` Julien Grall
2018-02-19 15:32     ` Andre Przywara
2018-02-19 15:43       ` Julien Grall
2018-03-02 16:36         ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 32/49] ARM: new VGIC: Add ACTIVE " Andre Przywara
2018-02-16 17:30   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 33/49] ARM: new VGIC: Add PRIORITY " Andre Przywara
2018-02-16 17:38   ` Julien Grall
2018-02-23 14:47     ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 34/49] ARM: new VGIC: Add CONFIG " Andre Przywara
2018-02-19 11:39   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 35/49] ARM: new VGIC: Add TARGET " Andre Przywara
2018-02-19 11:53   ` Julien Grall
2018-02-23 11:25     ` Andre Przywara
2018-02-19 12:30   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 36/49] ARM: new VGIC: Add SGIR register handler Andre Przywara
2018-02-19 11:59   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 37/49] ARM: new VGIC: Add SGIPENDR register handlers Andre Przywara
2018-02-19 12:02   ` Julien Grall
2018-02-23 11:39     ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 38/49] ARM: new VGIC: handle hardware mapped IRQs Andre Przywara
2018-02-19 12:19   ` Julien Grall
2018-02-23 18:02     ` Andre Przywara
2018-02-23 18:14       ` Julien Grall
2018-02-26 16:48         ` Andre Przywara [this message]
2018-02-26 16:57           ` Julien Grall
2018-02-26 17:19             ` Andre Przywara
2018-02-26 17:26               ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 39/49] ARM: new VGIC: Add event channel IRQ handling Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 40/49] ARM: new VGIC: Handle virtual IRQ allocation/reservation Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 41/49] ARM: new VGIC: dump virtual IRQ info Andre Przywara
2018-02-19 12:26   ` Julien Grall
2018-02-26 16:58     ` Andre Przywara
2018-02-26 17:01       ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 42/49] ARM: new VGIC: provide system register emulation stub Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 43/49] ARM: new VGIC: Add preliminary stub implementations Andre Przywara
2018-02-19 12:34   ` Julien Grall
2018-02-27 17:05     ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 44/49] ARM: new VGIC: vgic-init: register VGIC Andre Przywara
2018-02-19 12:39   ` Julien Grall
2018-02-26 17:33     ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 45/49] ARM: new VGIC: vgic-init: implement vgic_init Andre Przywara
2018-02-19 13:21   ` Julien Grall
2018-02-19 15:53     ` Andre Przywara
2018-02-19 15:58       ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 46/49] ARM: new VGIC: vgic-init: implement map_resources Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 47/49] ARM: new VGIC: Add vgic_v2_enable Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 48/49] ARM: allocate two pages for struct vcpu Andre Przywara
2018-02-19 14:07   ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 49/49] ARM: VGIC: wire new VGIC(-v2) files into Xen build system Andre Przywara
2018-02-09 15:06 ` [RFC PATCH 00/49] New VGIC(-v2) implementation Andre Przywara
2018-02-12 11:48   ` Julien Grall
2018-02-12 11:53     ` Andre Przywara

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