From: Julien Grall <julien.grall@arm.com>
To: Dario Faggioli <dario.faggioli@citrix.com>,
Stefano Stabellini <sstabellini@kernel.org>
Cc: Andre Przywara <andre.przywara@arm.com>,
Steve Capper <Steve.Capper@arm.com>,
george.dunlap@citrix.com, Vijay Kilari <vijay.kilari@gmail.com>,
xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [RFC PATCH 21/24] ARM: vITS: handle INVALL command
Date: Tue, 6 Dec 2016 23:24:06 +0000 [thread overview]
Message-ID: <9488db07-93fe-b8fb-7858-0f526fbbc1a3@arm.com> (raw)
In-Reply-To: <1481063995.3445.125.camel@citrix.com>
Hi Dario,
On 06/12/2016 22:39, Dario Faggioli wrote:
> On Tue, 2016-12-06 at 13:53 -0800, Stefano Stabellini wrote:
>> On Tue, 6 Dec 2016, Dario Faggioli wrote:
>>> Sorry if I can't be more useful than this for now. :-/
>>
>> We don't need scheduler support to implement interrupt migration. The
>> question was much simpler than that: moving a vCPU with interrupts
>> assigned to it is slower than moving a vCPU without interrupts
>> assigned
>> to it. You could say that the slowness is directly proportional do
>> the
>> number of interrupts assigned to the vCPU. Does the scheduler know
>> that?
>> Or blindly moves vCPUs around? Also see below.
>>
> Ah, ok, it is indeed a simpler question than I thought! :-)
>
> Answer: no, the scheduler does not use the information of how many or
> what interrupts are being routed to a vCPU in any way.
>
> Just for the sake of correctness and precision, it does not "blindly
> moves vCPUs around", as in, it follows some criteria for deciding
> whether or not to move a vCPU, and if yes, where to, but among those
> criteria, there is no trace of anything related to routed interrupts.
>
> Let me also add that the criteria are scheduler specific, so they're
> different, e.g., between Credit and Credit2.
>
> Starting considering routed interrupt as a migration criteria in Credit
> would be rather difficult. Credit use a 'best effort' approach for
> migrating vCPUs, which is hard to augment.
>
> Starting considering routed interrupt as a migration criteria in
> Credit2 would be much easier. Credit2's load balancer is specifically
> designed for being extendible with things like that. It would require
> some thinking, though, in order to figure out how important this
> particular aspect would be, wrt others that are considered.
>
> E.g., if I have pCPU 0 loaded at 75% and pCPU 1 loaded at 25%, vCPU A
> has a lot of routed interrupts, and moving it gives me perfect load
> balancing (i.e., load will become 50% on pCPU 0 and 50% on pCPU 1)
> should I move it or not?
> Well, it depends if whether or not we think that the overhead we save
> by not migrating outweights the benefit of a perfectly balanced system.
>
> Something like that...
This idea to migrate IRQ while migrating vCPU is already wrong to me as
this is really expensive, I am talking in term of milliseconds easily as
in some case Xen will have to interact with a shared command queue.
Spreading the load is much better and avoid to migrate directly IRQ that
are disabled when the vCPU is been migrated.
I cannot see any reason to not do that as changing the interrupt
affinity may be not taken into account directly. By that, I mean it
might be possible to receive another interrupt on the wrong pCPU.
I really think we should make the vCPU migration much simpler (e.g avoid
this big loop over interrupt). In fine, if we really expect the
scheduler to migrate the vCPU on a different pCPU. We should also expect
receiving the interrupt on the wrong pCPU may not happen often.
Regards,
--
Julien Grall
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next prev parent reply other threads:[~2016-12-06 23:24 UTC|newest]
Thread overview: 144+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-28 18:24 [RFC PATCH 00/24] [FOR 4.9] arm64: Dom0 ITS emulation Andre Przywara
2016-09-28 18:24 ` [RFC PATCH 01/24] ARM: GICv3 ITS: parse and store ITS subnodes from hardware DT Andre Przywara
2016-10-26 1:11 ` Stefano Stabellini
2016-11-01 15:13 ` Julien Grall
2016-11-14 17:35 ` Andre Przywara
2016-11-23 15:39 ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 02/24] ARM: GICv3: allocate LPI pending and property table Andre Przywara
2016-10-24 14:28 ` Vijay Kilari
2016-11-02 16:22 ` Andre Przywara
2016-10-26 1:10 ` Stefano Stabellini
2016-11-10 15:29 ` Andre Przywara
2016-11-10 21:00 ` Stefano Stabellini
2016-11-01 17:22 ` Julien Grall
2016-11-15 11:32 ` Andre Przywara
2016-11-23 15:58 ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 03/24] ARM: GICv3 ITS: allocate device and collection table Andre Przywara
2016-10-09 13:55 ` Vijay Kilari
2016-10-10 9:05 ` Andre Przywara
2016-10-24 14:30 ` Vijay Kilari
2016-11-02 17:51 ` Andre Przywara
2016-10-26 22:57 ` Stefano Stabellini
2016-11-01 17:34 ` Julien Grall
2016-11-10 15:32 ` Andre Przywara
2016-11-10 21:06 ` Stefano Stabellini
2016-11-01 18:19 ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 04/24] ARM: GICv3 ITS: map ITS command buffer Andre Przywara
2016-10-24 14:31 ` Vijay Kilari
2016-10-26 23:03 ` Stefano Stabellini
2016-11-10 16:04 ` Andre Przywara
2016-11-02 13:38 ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 05/24] ARM: GICv3 ITS: introduce ITS command handling Andre Przywara
2016-10-26 23:55 ` Stefano Stabellini
2016-10-27 21:52 ` Stefano Stabellini
2016-11-10 15:57 ` Andre Przywara
2016-11-02 15:05 ` Julien Grall
2017-01-31 9:10 ` Andre Przywara
2017-01-31 10:23 ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 06/24] ARM: GICv3 ITS: introduce host LPI array Andre Przywara
2016-10-27 22:59 ` Stefano Stabellini
2016-11-02 15:14 ` Julien Grall
2016-11-10 17:22 ` Andre Przywara
2016-11-10 21:48 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 07/24] ARM: GICv3 ITS: introduce device mapping Andre Przywara
2016-10-24 15:31 ` Vijay Kilari
2016-11-03 19:33 ` Andre Przywara
2016-10-28 0:08 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 08/24] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2016-10-24 15:31 ` Vijay Kilari
2016-11-03 19:47 ` Andre Przywara
2016-10-28 1:04 ` Stefano Stabellini
2017-01-12 19:14 ` Andre Przywara
2017-01-13 19:37 ` Stefano Stabellini
2017-01-16 9:44 ` André Przywara
2017-01-16 19:16 ` Stefano Stabellini
2016-11-04 15:46 ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 09/24] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2016-10-28 1:51 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 10/24] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2016-10-28 23:07 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 11/24] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2016-10-24 15:32 ` Vijay Kilari
2016-11-03 20:21 ` Andre Przywara
2016-11-04 11:53 ` Julien Grall
2016-10-29 0:39 ` Stefano Stabellini
2017-03-29 15:47 ` Andre Przywara
2016-11-02 17:18 ` Julien Grall
2016-11-02 17:41 ` Stefano Stabellini
2016-11-02 18:03 ` Julien Grall
2016-11-02 18:09 ` Stefano Stabellini
2017-01-31 9:10 ` Andre Przywara
2017-01-31 10:38 ` Julien Grall
2017-01-31 12:04 ` Andre Przywara
2016-09-28 18:24 ` [RFC PATCH 12/24] ARM: vGICv3: introduce basic ITS emulation bits Andre Przywara
2016-10-09 14:20 ` Vijay Kilari
2016-10-10 10:38 ` Andre Przywara
2016-10-24 15:31 ` Vijay Kilari
2016-11-03 19:26 ` Andre Przywara
2016-11-04 12:07 ` Julien Grall
2016-11-03 17:50 ` Julien Grall
2016-11-08 23:54 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 13/24] ARM: vITS: handle CLEAR command Andre Przywara
2016-11-04 15:48 ` Julien Grall
2016-11-09 0:39 ` Stefano Stabellini
2016-11-09 13:32 ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 14/24] ARM: vITS: handle INT command Andre Przywara
2016-11-09 0:42 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 15/24] ARM: vITS: handle MAPC command Andre Przywara
2016-11-09 0:48 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 16/24] ARM: vITS: handle MAPD command Andre Przywara
2016-11-09 0:54 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 17/24] ARM: vITS: handle MAPTI command Andre Przywara
2016-11-09 1:07 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 18/24] ARM: vITS: handle MOVI command Andre Przywara
2016-11-09 1:13 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 19/24] ARM: vITS: handle DISCARD command Andre Przywara
2016-11-09 1:28 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 20/24] ARM: vITS: handle INV command Andre Przywara
2016-11-09 1:49 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 21/24] ARM: vITS: handle INVALL command Andre Przywara
2016-10-24 15:32 ` Vijay Kilari
2016-11-04 9:22 ` Andre Przywara
2016-11-10 0:21 ` Stefano Stabellini
2016-11-10 11:57 ` Julien Grall
2016-11-10 20:42 ` Stefano Stabellini
2016-11-11 15:53 ` Julien Grall
2016-11-11 20:31 ` Stefano Stabellini
2016-11-18 18:39 ` Stefano Stabellini
2016-11-25 16:10 ` Julien Grall
2016-12-01 1:19 ` Stefano Stabellini
2016-12-02 16:18 ` Andre Przywara
2016-12-03 0:46 ` Stefano Stabellini
2016-12-05 13:36 ` Julien Grall
2016-12-05 19:51 ` Stefano Stabellini
2016-12-06 15:56 ` Julien Grall
2016-12-06 19:36 ` Stefano Stabellini
2016-12-06 21:32 ` Dario Faggioli
2016-12-06 21:53 ` Stefano Stabellini
2016-12-06 22:01 ` Stefano Stabellini
2016-12-06 22:12 ` Dario Faggioli
2016-12-06 23:13 ` Julien Grall
2016-12-07 20:20 ` Stefano Stabellini
2016-12-09 18:01 ` Julien Grall
2016-12-09 20:13 ` Stefano Stabellini
2016-12-09 18:07 ` Andre Przywara
2016-12-09 20:18 ` Stefano Stabellini
2016-12-14 2:39 ` George Dunlap
2016-12-16 1:30 ` Dario Faggioli
2016-12-06 22:39 ` Dario Faggioli
2016-12-06 23:24 ` Julien Grall [this message]
2016-12-07 0:17 ` Dario Faggioli
2016-12-07 20:21 ` Stefano Stabellini
2016-12-09 10:14 ` Dario Faggioli
2016-12-06 21:36 ` Dario Faggioli
2016-12-09 19:00 ` Andre Przywara
2016-12-10 0:30 ` Stefano Stabellini
2016-12-12 10:38 ` Andre Przywara
2016-12-14 0:38 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 22/24] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2016-11-10 0:38 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 23/24] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2016-09-28 18:24 ` [RFC PATCH 24/24] ARM: vGIC: advertising LPI support Andre Przywara
2016-11-10 0:49 ` Stefano Stabellini
2016-11-10 11:22 ` Julien Grall
2016-11-02 13:56 ` [RFC PATCH 00/24] [FOR 4.9] arm64: Dom0 ITS emulation Julien Grall
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