[PATCH v4 0/2] arm: address violations of MISRA C Rule 2.1

[PATCH v4 0/2] arm: address violations of MISRA C Rule 2.1

[Dmytro Prokopchuk1]

This patch series consists of two patches that were received by dividing PATCH v3.

Link to v3:
https://patchew.org/Xen/620eb8fe22204e204cb471e93d2ea789f879d854.1758744144.git.dmytro._5Fprokopchuk1@epam.com/

Changes in v4:
- PATCH v3 was divided in two separate patches
- added notes about predicates which end up as constants

Test CI pipeline:
https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2070317153

Dmytro Prokopchuk (2):
  arm/acpi: address violations of MISRA C Rule 2.1
  arm/gic_v3: address violations of MISRA C Rule 2.1

 xen/arch/arm/include/asm/domain_build.h |  9 ---------
 xen/arch/arm/include/asm/gic_v3_its.h   | 11 ++---------
 2 files changed, 2 insertions(+), 18 deletions(-)

-- 
2.43.0

[PATCH v4 1/2] arm/acpi: address violations of MISRA C Rule 2.1

[Dmytro Prokopchuk1]

MISRA C Rule 2.1 states: "A project shall not contain unreachable code".
In certain build configuration the following function 'prepare_acpi()' is
defined as inline function and contains the macro 'BUG()'. This resulted
in violation due to the function became non-returning.

To ensure compliance with MISRA C Rule 2.1 remove inline function and its
'BUG()'-based unreachable code. Provide unconditional function declaration
for 'prepare_acpi()'. Rely on the compiler's DCE to remove unused function
calls and use the compile-time constant predicate 'acpi_disabled', defined
as true when 'CONFIG_ACPI' is disabled, to statically resolve conditional
branches:
    if ( acpi_disabled )
    {
        ...
    }
    else
        rc = prepare_acpi(d, kinfo);

Signed-off-by: Dmytro Prokopchuk <dmytro_prokopchuk1@epam.com>
---
 xen/arch/arm/include/asm/domain_build.h | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
index c6fec3168c..6674dac5e2 100644
--- a/xen/arch/arm/include/asm/domain_build.h
+++ b/xen/arch/arm/include/asm/domain_build.h
@@ -15,16 +15,7 @@ void evtchn_allocate(struct domain *d);
 void set_interrupt(gic_interrupt_t interrupt, unsigned int irq,
                    unsigned int cpumask, unsigned int level);
 
-#ifndef CONFIG_ACPI
-static inline int prepare_acpi(struct domain *d, struct kernel_info *kinfo)
-{
-    /* Only booting with ACPI will hit here */
-    BUG();
-    return -EINVAL;
-}
-#else
 int prepare_acpi(struct domain *d, struct kernel_info *kinfo);
-#endif
 
 int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data);
 
-- 
2.43.0

[PATCH v4 2/2] arm/gic_v3: address violations of MISRA C Rule 2.1

[Dmytro Prokopchuk1]

MISRA C Rule 2.1 states: "A project shall not contain unreachable code".
In certain build configuration the following 'gicv3_its_setup_collection()'
function is defined as inline and contains the macro 'BUG()'. This resulted
in violation due to the function became non-returning.

To ensure compliance with MISRA C Rule 2.1 remove inline function and its
'BUG()'-based unreachable code. Provide unconditional function declaration
for 'gicv3_its_setup_collection()'. Rely on the compiler's DCE to remove
unused function calls, and use the 'gicv3_its_host_has_its()' predicate,
which always returns false when 'CONFIG_HAS_ITS' is disabled, to statically
resolve conditional branches:
    if ( gicv3_its_host_has_its() )
    {
        ...
        ret = gicv3_its_setup_collection(smp_processor_id());
        if ( ret )
            return ret;
    }

Signed-off-by: Dmytro Prokopchuk <dmytro_prokopchuk1@epam.com>
---
 xen/arch/arm/include/asm/gic_v3_its.h | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/asm/gic_v3_its.h
index 0737e67aa6..fc5a84892c 100644
--- a/xen/arch/arm/include/asm/gic_v3_its.h
+++ b/xen/arch/arm/include/asm/gic_v3_its.h
@@ -131,6 +131,8 @@ struct host_its {
     unsigned int flags;
 };
 
+/* Map a collection for this host CPU to each host ITS. */
+int gicv3_its_setup_collection(unsigned int cpu);
 
 #ifdef CONFIG_HAS_ITS
 
@@ -160,9 +162,6 @@ int gicv3_its_init(void);
 void gicv3_set_redist_address(paddr_t address, unsigned int redist_id);
 uint64_t gicv3_get_redist_address(unsigned int cpu, bool use_pta);
 
-/* Map a collection for this host CPU to each host ITS. */
-int gicv3_its_setup_collection(unsigned int cpu);
-
 /* Initialize and destroy the per-domain parts of the virtual ITS support. */
 int vgic_v3_its_init_domain(struct domain *d);
 void vgic_v3_its_free_domain(struct domain *d);
@@ -256,12 +255,6 @@ static inline void gicv3_set_redist_address(paddr_t address,
 {
 }
 
-static inline int gicv3_its_setup_collection(unsigned int cpu)
-{
-    /* We should never get here without an ITS. */
-    BUG();
-}
-
 static inline int vgic_v3_its_init_domain(struct domain *d)
 {
     return 0;
-- 
2.43.0

Resend: [PATCH v4 0/2] arm: address violations of MISRA C Rule 2.1

[Dmytro Prokopchuk1]

Hello,
looking forward to feedback, suggestions, or any required
changes to get this patch accepted.

BR, Dmytro.

On 9/29/25 21:43, Dmytro Prokopchuk1 wrote:
> This patch series consists of two patches that were received by dividing PATCH v3.
>
> Link to v3:
> https://patchew.org/Xen/620eb8fe22204e204cb471e93d2ea789f879d854.1758744144.git.dmytro._5Fprokopchuk1@epam.com/
>
> Changes in v4:
> - PATCH v3 was divided in two separate patches
> - added notes about predicates which end up as constants
>
> Test CI pipeline:
> https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2070317153
>
> Dmytro Prokopchuk (2):
>    arm/acpi: address violations of MISRA C Rule 2.1
>    arm/gic_v3: address violations of MISRA C Rule 2.1
>
>   xen/arch/arm/include/asm/domain_build.h |  9 ---------
>   xen/arch/arm/include/asm/gic_v3_its.h   | 11 ++---------
>   2 files changed, 2 insertions(+), 18 deletions(-)
>