From: Jean Guyader <jean.guyader@gmail.com>
To: Ian Jackson <Ian.Jackson@eu.citrix.com>
Cc: Isaku Yamahata <yamahata@valinux.co.jp>,
"xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
"Kay, Allen M" <allen.m.kay@intel.com>,
Jean Guyader <Jean.Guyader@citrix.com>,
Stabellini <Stefano.Stabellini@eu.citrix.com>
Subject: Re: Re: [PATCH][VTD][v2] enable calpella/sandybridge integreated graphics passthrough
Date: Thu, 10 Jun 2010 16:29:59 +0100 [thread overview]
Message-ID: <AANLkTimA63jcTO5w7bgYF1xBnBRiGxR76dgjU4zkj0Lj@mail.gmail.com> (raw)
In-Reply-To: <19471.48713.133746.522898@mariner.uk.xensource.com>
On 9 June 2010 17:16, Ian Jackson <Ian.Jackson@eu.citrix.com> wrote:
> Kay, Allen M writes ("[PATCH][VTD][v2] enable calpella/sandybridge integreated graphics passthrough"):
>> This QEMU patch enables calpella and sandybridge integrated graphics passthrough.
>>
>> Changes in version 2: Incorporated feedbacks from Stephano and Isaku.
>
> Thanks. I'm sure this is fine (or at least, I will be when someone
> acks it) but it really could do with some explanation of why it's
> right - in terms of the code changes, rather than just "makes some
> particular chip work".
>
The intel gpu driver for this platform has more expectation on the
hardware so we have to expose more thing to the guest:
- opregion: It's a NVS storage and the driver use it to communicate
between the bios and the driver, so we have to map it.
- pci-to-pci bridge: The driver check if such device is there, so
we have to expose it.
Actually those are changes to please the driver more than the chip itself.
Jean
prev parent reply other threads:[~2010-06-10 15:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-08 22:41 [PATCH][VTD][v2] enable calpella/sandybridge integreated graphics passthrough Kay, Allen M
2010-06-09 16:16 ` Ian Jackson
2010-06-10 15:29 ` Jean Guyader [this message]
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