Re: [PATCH] x86: add support for newest version of Intel CPUID masking

[Haitao Shan <maillists.shan@gmail.com>]

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Hi, Jan,

Please hold the patch for a while, as we are internally check the
specifications of CPUID masking.
Possibly, there will be some updates that changes the details of masking.
Thanks!

Shan Haitao

2011/5/13 Jan Beulich <JBeulich@novell.com>

> This follows appnote 485 rev 037, with a slight deviation in the leaf
> 0xd masking: The document states that ECX and EDX outputs get masked,
> but with the bit fields of interest being in EAX and EDX (while ECX
> holds other information that doesn't make sense to be masked), option
> and variable names use 'eax' instead.
>
> (Jun, would be nice if you could confirm this.)
>
> Signed-off-by: Jan Beulich <jbeulich@novell.com>
>
> --- 2011-04-29.orig/xen/arch/x86/cpu/common.c   2011-04-26
> 08:19:36.000000000 +0200
> +++ 2011-04-29/xen/arch/x86/cpu/common.c        2011-05-12
> 18:10:10.000000000 +0200
> @@ -20,10 +20,17 @@ size_param("cachesize", cachesize_overri
>
>  static bool_t __cpuinitdata use_xsave = 1;
>  boolean_param("xsave", use_xsave);
> +
>  unsigned int __devinitdata opt_cpuid_mask_ecx = ~0u;
>  integer_param("cpuid_mask_ecx", opt_cpuid_mask_ecx);
>  unsigned int __devinitdata opt_cpuid_mask_edx = ~0u;
>  integer_param("cpuid_mask_edx", opt_cpuid_mask_edx);
> +
> +unsigned int __devinitdata opt_cpuid_mask_xsave_eax = ~0u;
> +integer_param("cpuid_mask_ecx", opt_cpuid_mask_xsave_eax);
> +unsigned int __devinitdata opt_cpuid_mask_xsave_edx = ~0u;
> +integer_param("cpuid_mask_edx", opt_cpuid_mask_xsave_edx);
> +
>  unsigned int __devinitdata opt_cpuid_mask_ext_ecx = ~0u;
>  integer_param("cpuid_mask_ext_ecx", opt_cpuid_mask_ext_ecx);
>  unsigned int __devinitdata opt_cpuid_mask_ext_edx = ~0u;
> --- 2011-04-29.orig/xen/arch/x86/cpu/cpu.h      2010-06-16
> 12:26:43.000000000 +0200
> +++ 2011-04-29/xen/arch/x86/cpu/cpu.h   2011-05-13 10:51:00.000000000 +0200
> @@ -22,6 +22,7 @@ struct cpu_dev {
>  extern struct cpu_dev * cpu_devs [X86_VENDOR_NUM];
>
>  extern unsigned int opt_cpuid_mask_ecx, opt_cpuid_mask_edx;
> +extern unsigned int opt_cpuid_mask_xsave_eax, opt_cpuid_mask_xsave_edx;
>  extern unsigned int opt_cpuid_mask_ext_ecx, opt_cpuid_mask_ext_edx;
>
>  extern int get_model_name(struct cpuinfo_x86 *c);
> --- 2011-04-29.orig/xen/arch/x86/cpu/intel.c    2011-03-11
> 10:13:55.000000000 +0100
> +++ 2011-04-29/xen/arch/x86/cpu/intel.c 2011-05-13 10:51:09.000000000 +0200
> @@ -49,9 +49,12 @@ static void __devinit set_cpuidmask(cons
>                wrmsr(MSR_INTEL_CPUID_FEATURE_MASK,
>                      opt_cpuid_mask_ecx,
>                      opt_cpuid_mask_edx);
> -               if (!~(opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx))
> +               if (~(opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx))
> +                       extra = "extended ";
> +               else if (~(opt_cpuid_mask_xsave_eax &
> opt_cpuid_mask_xsave_edx))
> +                       extra = "xsave ";
> +               else
>                        return;
> -               extra = "extended ";
>                break;
>  /*
>  * CPU supports this feature if the processor signature meets the
> following:
> @@ -71,11 +74,25 @@ static void __devinit set_cpuidmask(cons
>                wrmsr(MSR_INTEL_CPUID80000001_FEATURE_MASK,
>                      opt_cpuid_mask_ext_ecx,
>                      opt_cpuid_mask_ext_edx);
> +               if (!~(opt_cpuid_mask_xsave_eax &
> opt_cpuid_mask_xsave_edx))
> +                       return;
> +               extra = "xsave ";
> +               break;
> +       case 0x2a:
> +               wrmsr(MSR_INTEL_CPUID1_FEATURE_MASK_V2,
> +                     opt_cpuid_mask_ecx,
> +                     opt_cpuid_mask_edx);
> +               wrmsr(MSR_INTEL_CPUIDD0_FEATURE_MASK,
> +                     opt_cpuid_mask_xsave_eax,
> +                     opt_cpuid_mask_xsave_edx);
> +               wrmsr(MSR_INTEL_CPUID80000001_FEATURE_MASK_V2,
> +                     opt_cpuid_mask_ext_ecx,
> +                     opt_cpuid_mask_ext_edx);
>                return;
>        }
>
> -       printk(XENLOG_ERR "Cannot set CPU feature mask on CPU#%d\n",
> -              smp_processor_id());
> +       printk(XENLOG_ERR "Cannot set CPU %sfeature mask on CPU#%d\n",
> +              extra, smp_processor_id());
>  }
>
>  void __devinit early_intel_workaround(struct cpuinfo_x86 *c)
> --- 2011-04-29.orig/xen/include/asm-x86/msr-index.h     2011-01-06
> 16:44:36.000000000 +0100
> +++ 2011-04-29/xen/include/asm-x86/msr-index.h  2011-05-12
> 18:17:28.000000000 +0200
> @@ -161,6 +161,10 @@
>  #define MSR_INTEL_CPUID1_FEATURE_MASK  0x00000130
>  #define MSR_INTEL_CPUID80000001_FEATURE_MASK 0x00000131
>
> +#define MSR_INTEL_CPUID1_FEATURE_MASK_V2        0x00000132
> +#define MSR_INTEL_CPUID80000001_FEATURE_MASK_V2 0x00000133
> +#define MSR_INTEL_CPUIDD0_FEATURE_MASK          0x00000134
> +
>  /* MSRs & bits used for VMX enabling */
>  #define MSR_IA32_VMX_BASIC                      0x480
>  #define MSR_IA32_VMX_PINBASED_CTLS              0x481
>
>
>
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>
>

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