From: Keir Fraser <keir.fraser@eu.citrix.com>
To: Joerg Roedel <joro@8bytes.org>, Tim Deegan <Tim.Deegan@eu.citrix.com>
Cc: Christoph Egger <Christoph.Egger@amd.com>,
"xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
Qing He <qing.he@intel.com>
Subject: Re: Fwd: [PATCH 0/18] Nested Virtualization: Overview
Date: Sun, 18 Apr 2010 18:52:30 +0100 [thread overview]
Message-ID: <C7F1056E.11A9A%keir.fraser@eu.citrix.com> (raw)
In-Reply-To: <20100417114320.GC23260@8bytes.org>
On 17/04/2010 12:43, "Joerg Roedel" <joro@8bytes.org> wrote:
>> Your PDFs suggest that even on Intel CPUs, the nested hypervisor should
>> always see SVM, not VMX. You shouldn't be surprised or offended if that
>> isn't popular with Intel. :)
>
> Well, it would make sense for Intel too virtualize SVM because it
> doesn't has the performance issues with lots and lots of emulated
> vmread/vmwrite instructions that cause vmexits in the nested case. The
> bigger problem with SVM on VMX is that it could never be complete
> because afaik VMX has fewer intercepts than SVM.
I don't think either VMX-on-SVM or SVM-on-VMX should be an aim. I mean, we'd
have to completely emulate the underlying Intel processor, say, as AMD, to
ensure SVM code paths get taken in the guest kernel/hypervisor. It's not
really on.
-- Keir
prev parent reply other threads:[~2010-04-18 17:52 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-15 13:20 Fwd: [PATCH 0/18] Nested Virtualization: Overview Christoph Egger
2010-04-15 13:39 ` Vincent Hanquez
2010-04-15 14:50 ` Christoph Egger
2010-04-15 14:51 ` Christoph Egger
2010-04-15 14:57 ` Keir Fraser
2010-04-15 15:17 ` Christoph Egger
2010-04-15 16:26 ` Keir Fraser
2010-04-15 15:25 ` Tim Deegan
2010-04-16 10:01 ` Christoph Egger
2010-04-16 9:07 ` Qing He
2010-04-16 9:32 ` Christoph Egger
2010-04-16 10:27 ` Tim Deegan
2010-04-16 17:50 ` Keir Fraser
2010-04-20 2:07 ` Dong, Eddie
2010-04-17 11:43 ` Joerg Roedel
2010-04-18 17:52 ` Keir Fraser [this message]
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