From mboxrd@z Thu Jan  1 00:00:00 1970
From: Keir Fraser <keir.fraser@eu.citrix.com>
Subject: Re: one question to p2m table entry type
Date: Tue, 18 May 2010 13:28:55 +0100
Message-ID: <C8184697.14832%keir.fraser@eu.citrix.com>
References: <20100518110455.GE4164@whitby.uk.xensource.com>
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To: Tim Deegan <Tim.Deegan@eu.citrix.com>, "Jiang, Yunhong" <yunhong.jiang@intel.com>
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On 18/05/2010 12:04, "Tim Deegan" <Tim.Deegan@eu.citrix.com> wrote:

>> But since we don't support pure 32 bit xen hypervisor any more, and
>> for 32 PAE, we are sure have enough bit to keep these flags, why do we
>> need these special handling? Are there any special reason for it?
> 
> The Intel SDMs (section 3.8.5, figure 3-20 in the copy in front of me)
> only define three available bits in PAE PTEs; all bits above MAXPHYADDR
> are reserved.  If we can rely on the manuals being wrong about that, we
> can extend the number of p2m types on 32-bit XEN. :)

If I previously replied positively about this patch, it's because I forgot
about the above PAE restriction.

 -- Keir