From: Keir Fraser <keir@xen.org>
To: Andre Przywara <andre.przywara@amd.com>
Cc: xen-devel <xen-devel@lists.xensource.com>
Subject: Re: [PATCH 3/5] svm: implement instruction fetch part of DecodeAssist
Date: Mon, 18 Apr 2011 10:10:46 +0100 [thread overview]
Message-ID: <C9D1BEA6.2CB7C%keir@xen.org> (raw)
In-Reply-To: <4DA83889.5060306@amd.com>
On 15/04/2011 13:22, "Andre Przywara" <andre.przywara@amd.com> wrote:
> Newer SVM implementations (Bulldozer) copy up to 15 bytes from the
> instruction stream into the VMCB when a #PF or #NPF exception is
> intercepted. This patch makes use of this information if available.
> This saves us from a) traversing the guest's page tables, b) mapping
> the guest's memory and c) copy the instructions from there into the
> hypervisor's address space.
> This speeds up #NPF intercepts quite a lot and avoids cache and TLB
> trashing.
This is a bit skanky. I'll have a think about a neater way of doing it.
-- Keir
> Signed-off-by: Andre Przywara <andre.przywara@amd.com>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xensource.com
> http://lists.xensource.com/xen-devel
next prev parent reply other threads:[~2011-04-18 9:10 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-15 12:16 [PATCH 0/5] svm: implement new DecodeAssist feature Andre Przywara
2011-04-15 12:21 ` [PATCH 1/5] vmx/hvm: move mov-cr handling functions to generic HVM code Andre Przywara
2011-04-18 8:48 ` Keir Fraser
2011-04-15 12:21 ` [PATCH 2/5] svm: add bit definitions for SVM DecodeAssist Andre Przywara
2011-04-15 12:22 ` [PATCH 3/5] svm: implement instruction fetch part of DecodeAssist Andre Przywara
2011-04-18 9:10 ` Keir Fraser [this message]
2011-04-18 12:37 ` Keir Fraser
2011-04-15 12:23 ` [PATCH 4/5] svm: implement CR access " Andre Przywara
2011-04-15 12:24 ` [PATCH 5/5] svm: implement INVLPG " Andre Przywara
2011-04-18 9:07 ` Keir Fraser
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