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From: Keir Fraser <keir.xen@gmail.com>
To: "Tian, Kevin" <kevin.tian@intel.com>,
	xen devel <xen-devel@lists.xensource.com>
Subject: Re: [PATCH] x86, cpuidle: remove assertion on X86_FEATURE_TSC_RELIABLE
Date: Fri, 13 May 2011 06:55:26 +0100	[thread overview]
Message-ID: <C9F2865E.1A39D%keir.xen@gmail.com> (raw)
In-Reply-To: <625BA99ED14B2D499DC4E29D8138F1505C8F0A4971@shsmsx502.ccr.corp.intel.com>

On 13/05/2011 03:45, "Tian, Kevin" <kevin.tian@intel.com> wrote:

> x86, cpuidle: remove assertion on X86_FEATURE_TSC_RELIABLE
> 
> 23228:1329d99b4f16 disables deep cstate to avoid restoring tsc when
> tsc msr is not writtable on some old platform, which however also
> adds an assertion on X86_FEATURE_TSC_RELIABLE in cstate_restore_tsc.
> The two don't match as tsc writtable-ness has nothing to do with
> whether it's reliable. As long as Xen can use tsc as the time source
> and it's writable, it should be OK to continue using deep cstate
> with tsc save/restore.

Looks like I just got the assertion the wrong way round, should be
ASSERT(!boot_cpu_has(X86_FEATURE_TSC_RELIABLE)).

> Also mark tsc as reliable for X86_FEATURE_CONSTANT_TSC.

Unrelated change? Also, TSC_RELIABLE should only be asserted on NONSTOP_TSC
platforms. I suspect this change is not correct.

 -- Keir

> Without this fix, one of our platform hits the assertion which
> only has constant tsc feature.
> 
> Signed-off-by: Kevin Tian <kevin.tian@intel.com>
> 
> diff -r 0c446850d85e xen/arch/x86/cpu/intel.c
> --- a/xen/arch/x86/cpu/intel.c Wed May 11 12:58:04 2011 +0100
> +++ b/xen/arch/x86/cpu/intel.c Fri May 13 10:01:20 2011 +0800
> @@ -221,8 +221,10 @@
> if (c->x86 == 6) 
> set_bit(X86_FEATURE_P3, c->x86_capability);
> if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
> -  (c->x86 == 0x6 && c->x86_model >= 0x0e))
> +  (c->x86 == 0x6 && c->x86_model >= 0x0e)) {
> set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> +  set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
> + }
> if (cpuid_edx(0x80000007) & (1u<<8)) {
> set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
> set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
> diff -r 0c446850d85e xen/arch/x86/time.c
> --- a/xen/arch/x86/time.c Wed May 11 12:58:04 2011 +0100
> +++ b/xen/arch/x86/time.c Fri May 13 10:01:20 2011 +0800
> @@ -686,8 +686,6 @@
>      if ( boot_cpu_has(X86_FEATURE_NONSTOP_TSC) )
>          return;
>  
> -    ASSERT(boot_cpu_has(X86_FEATURE_TSC_RELIABLE));
> -
>      write_tsc(stime2tsc(read_platform_stime()));
>  }
> 
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xensource.com
> http://lists.xensource.com/xen-devel

  reply	other threads:[~2011-05-13  5:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-13  2:45 [PATCH] x86, cpuidle: remove assertion on X86_FEATURE_TSC_RELIABLE Tian, Kevin
2011-05-13  5:55 ` Keir Fraser [this message]
2011-05-13  6:01   ` Tian, Kevin
2011-05-13  7:14   ` Jan Beulich
2011-05-13  7:28     ` Tian, Kevin
2011-05-13  8:17       ` Jan Beulich
2011-05-13  8:29     ` Keir Fraser
2011-05-13  8:49       ` Tian, Kevin
2011-05-13  9:15         ` Keir Fraser
2011-05-13  9:42           ` Jan Beulich
2011-05-17  0:51           ` Tian, Kevin
2011-05-13 17:16         ` Dan Magenheimer
2011-05-17  0:50           ` Tian, Kevin
2011-05-17  7:58             ` Keir Fraser

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