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From: bharat gohil <ghl.bhrt@gmail.com>
To: Julien Grall <julien.grall@arm.com>
Cc: Oleksandr Tyshchenko <olekstysh@gmail.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Andrii Anisov <andrii_anisov@epam.com>,
	Xen Devel <xen-devel@lists.xen.org>
Subject: Re: ARM64:Porting xen to new hardware
Date: Mon, 26 Feb 2018 13:01:16 +0530	[thread overview]
Message-ID: <CABdg74cT2kAcfUO7Y3CX34EUsdCWszVzEmouq5M=k8_3OBKKxQ@mail.gmail.com> (raw)
In-Reply-To: <ce1b842d-feb7-e7d7-965b-634b9f0108da@arm.com>


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Regards,
Bharat Gohil


On Thu, Feb 22, 2018 at 4:57 PM, Julien Grall <julien.grall@arm.com> wrote:

> Hi,
>
> Please configure your e-mail client to quote with '>'. It is incredibly
> difficult to read e-mail when space is used for quoting (see below).
>
>
> On 22/02/18 10:33, bharat gohil wrote:
>
>>         I have tried your suggestion, I got following crash. It unable
>>         find interrupt controller but this kernel working fine without
>> Xen.
>>         Do you have any suggestion?
>>
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000] OF:
>>         of_irq_init: children remain, but no parents
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000] Kernel panic -
>>         not syncing: No interrupt controller found.
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000] CPU: 0 PID: 0
>>         Comm: swapper/0 Not tainted 4.9.44+ #15
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000] Hardware name:
>>         XXXXX board (DT)
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000] Call trace:
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000]
>>         [<ffffff8008089f88>] dump_backtrace+0x0/0x1d8
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000]
>>         [<ffffff800808a184>] show_stack+0x24/0x30
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000]
>>         [<ffffff800838a0e4>] dump_stack+0x94/0xb8
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000]
>>         [<ffffff8008196da0>] panic+0x124/0x270
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000]
>>         [<ffffff8008c92c08>] init_IRQ+0x24/0x2c
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000]
>>         [<ffffff8008c909f8>] start_kernel+0x230/0x388
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000]
>>         [<ffffff8008c901e0>] __primary_switched+0x5c/0x64
>>         [2018-02-22 14:04:15] (XEN) DOM0: [    0.000000] Rebooting in 1
>>         seconds..
>>
>>
>>     SoC has different interrupt parent than GIC so I make GIC as
>>     interrupt parent and I am able to move ahead. update you once Dom0
>>     boot completely.
>>
>
> This looks quite wrong to me. By modifying the interrupt parent property,
> you also modify which interrupt controller will be used for routing the
> interrupt. This is probably the reason of the hang you mention below.
>
> What are the interrupts controller you have on your platform?
>
> >It has interrupt controller which change the polarity of SPI IRQ before
redirect to GIC-400.
>In DTB debug, I got following trace,
>(XEN) irq 0 not connected to primary controller. Connected to
/intpol-controller@10220a80.
>I think Xen skip interrupt controller(if other than GIC) while domain
creation.
>Do you have suggestion to solve this?
>Do I need to support custom IRQ controller in Xen or hard code the custom
controller register in Xen and modified DTB with GIC as primary controller?

>
>
>>
>> System got hand and I got following traces related to energy aware
>> scheduler. Is Xen affected with guest scheduling mechanism? I have SoC
>> which has 4-Cortex A35 and 2-Cortex A72.
>>
>> [    0.202545] Xen: initializing cpu4
>> [    0.202562] Invalid sched_group_energy for CPU4
>> [    0.202564] CPU4: update cpu_capacity 1024
>> [    0.202566] CPU4: Booted secondary processor [410fd041]
>> [    0.230197] Detected PIPT I-cache on CPU5
>> [    0.230202] CPU features: SANITY CHECK: Unexpected variation in
>> SYS_ID_AA64MMFR0_EL1. Boot CPU: 0x00000000101122, CPU5: 0x00000000001124
>> [    0.230250] Xen: initializing cpu5
>> [    0.230264] Invalid sched_group_energy for CPU5
>> [    0.230265] CPU5: update cpu_capacity 1024
>> [    0.230267] CPU5: Booted secondary processor [410fd041]
>> [    0.230373] Brought up 6 CPUs
>> [    0.234084] SMP: Total of 6 processors activated.
>> [    0.234108] CPU features: detected feature: 32-bit EL0 Support
>> [    0.234382] CPU: All CPU(s) started at EL1
>> [    0.234627] Invalid sched_group_energy for CPU5
>> [    0.234662] CPU5: update max cpu_capacity 1024
>> [    0.234680] Invalid sched_group_energy for Cluster5
>> [    0.234698] Invalid sched_group_energy for CPU4
>> [    0.234715] Invalid sched_group_energy for Cluster4
>> [    0.234733] Invalid sched_group_energy for CPU3
>> [    0.234750] Invalid sched_group_energy for Cluster3
>> [    0.234767] Invalid sched_group_energy for CPU2
>> [    0.234784] Invalid sched_group_energy for Cluster2
>> [    0.234801] Invalid sched_group_energy for CPU1
>> [    0.234819] Invalid sched_group_energy for Cluster1
>> [    0.234836] Invalid sched_group_energy for CPU0
>> [    0.234853] Invalid
>>
>
> Cheers,
>
> --
> Julien Grall
>

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  reply	other threads:[~2018-02-26  7:31 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-29 14:21 ARM64:Porting xen to new hardware bharat gohil
2017-08-30 14:14 ` Oleksandr Tyshchenko
2017-08-30 14:30   ` bharat gohil
2017-08-31 11:13     ` bharat gohil
2017-08-31 11:58       ` Oleksandr Tyshchenko
2017-09-04  4:13         ` bharat gohil
2017-09-04 12:54           ` Oleksandr Tyshchenko
2017-09-06  7:01             ` bharat gohil
2017-09-06 10:19               ` Oleksandr Tyshchenko
2017-09-07 13:30                 ` bharat gohil
2017-09-08 19:19                   ` Oleksandr Tyshchenko
2017-09-18 14:46                     ` Konrad Rzeszutek Wilk
2017-09-22 10:00                       ` bharat gohil
2017-09-22 13:43                         ` Konrad Rzeszutek Wilk
2017-09-25  8:42                           ` bharat gohil
2017-09-25 12:15                             ` Andrii Anisov
2017-09-25 12:53                               ` bharat gohil
2017-09-25 13:29                                 ` Julien Grall
2017-09-25 17:40                                   ` bharat gohil
2017-09-25 18:08                                     ` Oleksandr Tyshchenko
2017-09-29  8:15                                       ` bharat gohil
2017-09-29 17:42                                         ` Julien Grall
2017-10-03  7:05                                           ` bharat gohil
2017-10-06 13:29                                             ` Julien Grall
2018-02-22  8:43                                               ` bharat gohil
2018-02-22  9:45                                                 ` bharat gohil
2018-02-22 10:33                                                   ` bharat gohil
2018-02-22 10:38                                                     ` bharat gohil
2018-02-22 11:01                                                     ` Andrii Anisov
2018-02-22 11:20                                                       ` Julien Grall
2018-02-22 11:11                                                     ` Andrii Anisov
2018-02-22 11:27                                                     ` Julien Grall
2018-02-26  7:31                                                       ` bharat gohil [this message]
2018-02-26 10:21                                                         ` Julien Grall
2018-02-26 13:09                                                           ` bharat gohil
2017-09-25 13:30                                 ` Andrii Anisov

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