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From: Meng Xu <mengxu@seas.upenn.edu>
To: Jan Beulich <JBeulich@suse.com>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: xuquan8@huawei.com
Subject: Re: Question about the general performance counter overflow interrupt handling
Date: Fri, 31 Mar 2017 11:46:18 -0400	[thread overview]
Message-ID: <CAENZ-+n+Z9hJEEtFgreApKO1B715APT-VZG63T-TZ8HN6HAAaA@mail.gmail.com> (raw)
In-Reply-To: <CAENZ-+=b64dfbrTEW+K+Z7Z4OuYQ6i7st3Pm4E=jDCO2W8VdXg@mail.gmail.com>

[Sorry, I cc.ed Quan's previous email at Intel. Change to his current email.]

On Fri, Mar 31, 2017 at 11:41 AM, Meng Xu <mengxu@seas.upenn.edu> wrote:
> Hi Jan and Boris,
>
> I'm Meng Xu from the University of Pennsylvania.
>
> I'm wondering:
> How does Xen (vpmu) handle the general performance counter's overflow interrupt?
> Could you point me to the function handler, if Xen does handle it?
>
> ---What I want to achieve---
> I'm looking at the real-time performance in Xen.
> I want to profile the system's status for every K L3 cache misses from
> a specific core.
> I plan to program the general performance counter to -K to trigger an
> overflow interrupt. In the interrupt handler, I plan to check the
> system's status and give hints to the scheduler.
>
> --- What I have tried ---
> I want to find the interrupt handler and plug in another function.
> 1) I checked Xen's vpmu command option, it does not say vpmu handles
> the general performance counter's overflow interrupt.
>
> 2) I also added a function inside pmu_apic_interrupt() in apic.c.
> However, it seems that the pmu_apic_interrupt() is not triggered when
> the general performance counter overflows.
>
> When I program the general performance counter to trigger an overflow
> interrupt, I set the following bits for the event selector register
> and run a task to generate the L3 cache cache miss.
> FLAG_ENABLE: 0x400000UL
> FLAG_INT:    0x100000UL
> FLAG_USR: 0x010000UL
> L3_ALLMISS_EVENT    0x2E
> L3_ALLMISS_MESI     0x41
>
> I'm sure the performance counter does overflow, but I didn't see any
> interrupt was triggered. Maybe I missed something?
>
> Thank you very much for your help and time!
>
> Best regards,
>
> Meng
> -----------
> Meng Xu
> PhD Candidate in Computer and Information Science
> University of Pennsylvania
> http://www.cis.upenn.edu/~mengxu/

-- 
-----------
Meng Xu
PhD Student in Computer and Information Science
University of Pennsylvania
http://www.cis.upenn.edu/~mengxu/

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  reply	other threads:[~2017-03-31 15:46 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-31 15:41 Question about the general performance counter overflow interrupt handling Meng Xu
2017-03-31 15:46 ` Meng Xu [this message]
2017-03-31 16:01   ` Boris Ostrovsky
2017-03-31 17:32     ` Meng Xu
2017-03-31 17:49       ` Boris Ostrovsky
2017-03-31 15:52 ` Jan Beulich

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