From: Vijay Kilari <vijay.kilari@gmail.com>
To: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: Ian Campbell <Ian.Campbell@citrix.com>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Subject: Re: xen/arm: GIC: unable to inject hw irq warning
Date: Sat, 6 Sep 2014 12:51:14 +0530 [thread overview]
Message-ID: <CALicx6vv0ffv6v8P3-Ext020FhDXF5GV6VfOmaEi-cNh=D92pw@mail.gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.02.1409032335120.18866@kaball.uk.xensource.com>
On Thu, Sep 4, 2014 at 4:19 AM, Stefano Stabellini
<stefano.stabellini@eu.citrix.com> wrote:
> On Wed, 3 Sep 2014, Vijay Kilari wrote:
>> Hi Stefano,
>>
>> I face following warning messages for LPI/ITS interrupt.
>> Can you throw some light on this warning?
>>
>> (XEN) gic.c:394:d0v0 unable to inject hw irq=8736 into d0v0: already
>> active in LR0
>> (XEN) gic.c:394:d0v0 unable to inject hw irq=8736 into d0v0: already
>> active in LR0
>> (XEN) gic.c:394:d0v0 unable to inject hw irq=8736 into d0v0: already
>> active in LR1
>> (XEN) gic.c:394:d0v0 unable to inject hw irq=8736 into d0v0: already
>> active in LR1
>> (XEN) gic.c:394:d0v0 unable to inject hw irq=8736 into d0v0: already
>> active in LR1
>> (XEN) gic.c:394:d0v0 unable to inject hw irq=8736 into d0v0: already
>> active in LR0
>
> Hello Vijay,
> the warning is for a condition that should not happen. All the following
> must be true for the warning to trigger:
>
> - the irq is an hardware irq (p->desc != NULL)
>
> - the irq is active in the LR register (GICH_LR_ACTIVE)
>
> - we need to inject a second irq while the first one is still active
>
> The GICv2 specification explicitely states that it is not possible to
> set an hardware irq as pending and active in the LR registers (5-175).
Here in the code we are checking only for LR active state(0x2) and not
for ''pending and active' (0x3) state.
>
> Regardless from the GICv2 specification, it shouldn't be possible to
> receive a second hardware interrupt in Xen while the guest is still
> handling the first one. So the question is: how is it possible that xen
> is even trying to inject a second irq while the first one is still
> active? I would check how GIC_IRQ_GUEST_QUEUED was set.
Where in GICv2 specification it is mentioned?.
In case of GICv3 LPI's are edge triggered and there is no active state.
Once the hypervisor has EOI'd the LPI, it will be delivered again if
the device generates a new edge. See 4.3.2 and 4.1.5
In case of Xen if interrupt is already in LR (pending or active), Xen
ignores the interrupt right?
If so, are we not missing the interrupt?
Regards
Vijay
next prev parent reply other threads:[~2014-09-06 7:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-03 13:00 xen/arm: GIC: unable to inject hw irq warning Vijay Kilari
2014-09-03 22:49 ` Stefano Stabellini
2014-09-06 7:21 ` Vijay Kilari [this message]
2014-09-08 21:34 ` Stefano Stabellini
2014-09-08 21:48 ` Stefano Stabellini
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