Re: [PATCH] svm: Do not intercept RDTCS(P) when TSC scaling is supported by hardware

[Keir Fraser <keir.xen@gmail.com>]

Ah, okay. Well, depending on review feedback on list perhaps it can slip
into the schedule then. :-)


On 20/04/2012 16:06, "Huang2, Wei" <Wei.Huang2@amd.com> wrote:

> Hi Keir,
> 
> This patch is a bug fix for 23437:d7c755c25bb9 than new feature. It slipped my
> hand and Boris fixed it for me. The same applies to Xen-4.1.
> 
> ===== Changeset 23437 =====
> 
> HVM/SVM: enable tsc scaling ratio for SVM
> 
> Future AMD CPUs support TSC scaling. It allows guests to have a
> different TSC frequency from host system using this formula: guest_tsc
> = host_tsc * tsc_ratio + vmcb_offset. The tsc_ratio is a 64bit MSR
> contains a fixed-point number in 8.32 format (8 bits for integer part
> and 32bits for fractional part). For instance 0x00000003_80000000
> means tsc_ratio=3.5.
> 
> This patch enables TSC scaling ratio for SVM. With it, guest VMs don't
> need take #VMEXIT to calculate a translated TSC value when it is
> running under TSC emulation mode. This can substancially reduce the
> rdtsc overhead.
> 
> 
> -Wei
> 
> -----Original Message-----
> From: Keir Fraser [mailto:keir.xen@gmail.com] On Behalf Of Keir Fraser
> Sent: Friday, April 20, 2012 3:15 AM
> To: Ostrovsky, Boris; JBeulich@suse.com; Dan Magenheimer
> Cc: Huang2, Wei; xen-devel@lists.xensource.com
> Subject: Re: [PATCH] svm: Do not intercept RDTCS(P) when TSC scaling is
> supported by hardware
> 
> On 20/04/2012 09:05, "Keir Fraser" <keir.xen@gmail.com> wrote:
> 
>> On 20/04/2012 03:21, "Boris Ostrovsky" <boris.ostrovsky@amd.com> wrote:
>> 
>>> # HG changeset patch
>>> # User Boris Ostrovsky <boris.ostrovsky@amd.com>
>>> # Date 1334875170 14400
>>> # Node ID 55bf11ebce87ceb73fb2c372dcef170ec0bb4a18
>>> # Parent  7c777cb8f705411b77c551f34ba88bdc09e38ab8
>>> svm: Do not intercept RDTCS(P) when TSC scaling is supported by hardware
>>> 
>>> When running in TSC_MODE_ALWAYS_EMULATE mode on processors that support
>>> TSC scaling we don't need to intercept RDTSC/RDTSCP instructions.
>>> 
>>> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
>>> Acked-by: Wei Huang <wei.huang2@amd.com>
>>> Tested-by: Wei Huang <wei.huang2@amd.com>
>> 
>> Worth an ack/nack from Dan M I'd say. He'll probably have some comment about
>> possible cross-CPU TSC skew.
> 
> Oh, and apart from that, we're also in feature freeze for 4.2, and this
> isn't a bug fix. Similarly, it's not really a candidate for the stable 4.1
> branch either, at any time.
> 
>  -- Keir
> 
>>  -- Keir
>> 
>>> diff -r 7c777cb8f705 -r 55bf11ebce87 xen/arch/x86/hvm/svm/svm.c
>>> --- a/xen/arch/x86/hvm/svm/svm.c Wed Apr 18 16:49:55 2012 +0100
>>> +++ b/xen/arch/x86/hvm/svm/svm.c Thu Apr 19 18:39:30 2012 -0400
>>> @@ -724,12 +724,18 @@ static void svm_set_rdtsc_exiting(struct
>>>  {
>>>      struct vmcb_struct *vmcb = v->arch.hvm_svm.vmcb;
>>>      u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb);
>>> +    u32 general2_intercepts = vmcb_get_general2_intercepts(vmcb);
>>>  
>>>      general1_intercepts &= ~GENERAL1_INTERCEPT_RDTSC;
>>> -    if ( enable )
>>> +    general2_intercepts &= ~GENERAL2_INTERCEPT_RDTSCP;
>>> +
>>> +    if ( enable && !cpu_has_tsc_ratio ) {
>>>          general1_intercepts |= GENERAL1_INTERCEPT_RDTSC;
>>> +        general2_intercepts |= GENERAL2_INTERCEPT_RDTSCP;
>>> +    }
>>>  
>>>      vmcb_set_general1_intercepts(vmcb, general1_intercepts);
>>> +    vmcb_set_general2_intercepts(vmcb, general2_intercepts);
>>>  }
>>>  
>>>  static unsigned int svm_get_insn_bytes(struct vcpu *v, uint8_t *buf)
>>> 
>> 
>> 
> 
> 
> 
>