From: Keir Fraser <keir.xen@gmail.com>
To: Jan Beulich <JBeulich@suse.com>, xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH] x86: don't expose SYSENTER on unknown CPUs
Date: Fri, 17 Aug 2012 17:43:36 +0100 [thread overview]
Message-ID: <CC543348.3C46F%keir.xen@gmail.com> (raw)
In-Reply-To: <502E8C89020000780009600F@nat28.tlf.novell.com>
On 17/08/2012 17:25, "Jan Beulich" <JBeulich@suse.com> wrote:
> So far we only ever set up the respective MSRs on Intel CPUs, yet we
> hide the feature only on a 32-bit hypervisor. That prevents booting of
> PV guests on top of a 64-bit hypervisor making use of the instruction
> on unknown CPUs (VIA in this case).
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -55,6 +55,7 @@ static void default_init(struct cpuinfo_
> /* Not much we can do here... */
> /* Check if at least it has cpuid */
> BUG_ON(c->cpuid_level == -1);
> + __clear_bit(X86_FEATURE_SEP, c->x86_capability);
> }
>
> static struct cpu_dev default_cpu = {
>
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
prev parent reply other threads:[~2012-08-17 16:43 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-17 16:25 [PATCH] x86: don't expose SYSENTER on unknown CPUs Jan Beulich
2012-08-17 16:43 ` Keir Fraser [this message]
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