From: Keir Fraser <keir.xen@gmail.com>
To: Jan Beulich <JBeulich@suse.com>, xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH] x86: eliminate code affecting only 64-bit-incapable CPUs
Date: Fri, 21 Sep 2012 13:56:17 +0100 [thread overview]
Message-ID: <CC822281.3F5F1%keir.xen@gmail.com> (raw)
In-Reply-To: <505C7262020000780009CF66@nat28.tlf.novell.com>
On 21/09/2012 12:57, "Jan Beulich" <JBeulich@suse.com> wrote:
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -15,9 +15,6 @@
>
> #include "cpu.h"
>
> -static int cachesize_override __cpuinitdata = -1;
> -size_param("cachesize", cachesize_override);
> -
> static bool_t __cpuinitdata use_xsave = 1;
> boolean_param("xsave", use_xsave);
>
> @@ -120,17 +117,6 @@ void __cpuinit display_cacheinfo(struct
> ecx = cpuid_ecx(0x80000006);
> l2size = ecx >> 16;
>
> - /* do processor-specific cache resizing */
> - if (this_cpu->c_size_cache)
> - l2size = this_cpu->c_size_cache(c,l2size);
> -
> - /* Allow user to override all this if necessary. */
> - if (cachesize_override != -1)
> - l2size = cachesize_override;
> -
> - if ( l2size == 0 )
> - return; /* Again, no L2 cache is possible */
> -
> c->x86_cache_size = l2size;
>
> if (opt_cpu_info)
> @@ -138,32 +124,6 @@ void __cpuinit display_cacheinfo(struct
> l2size, ecx & 0xFF);
> }
>
> -/* Naming convention should be: <Name> [(<Codename>)] */
> -/* This table only is used unless init_<vendor>() below doesn't set it; */
> -/* in particular, if CPUID levels 0x80000002..4 are supported, this isn't
> used */
> -
> -/* Look up CPU names by table lookup. */
> -static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c)
> -{
> - struct cpu_model_info *info;
> -
> - if ( c->x86_model >= 16 )
> - return NULL; /* Range check */
> -
> - if (!this_cpu)
> - return NULL;
> -
> - info = this_cpu->c_models;
> -
> - while (info && info->family) {
> - if (info->family == c->x86)
> - return info->model_names[c->x86_model];
> - info++;
> - }
> - return NULL; /* Not found */
> -}
> -
> -
> static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c, int early)
> {
> char *v = c->x86_vendor_id;
> @@ -356,14 +316,9 @@ void __cpuinit identify_cpu(struct cpuin
>
> /* If the model name is still unset, do table lookup. */
> if ( !c->x86_model_id[0] ) {
> - char *p;
> - p = table_lookup_model(c);
> - if ( p )
> - safe_strcpy(c->x86_model_id, p);
> - else
> - /* Last resort... */
> - snprintf(c->x86_model_id, sizeof(c->x86_model_id),
> - "%02x/%02x", c->x86_vendor, c->x86_model);
> + /* Last resort... */
> + snprintf(c->x86_model_id, sizeof(c->x86_model_id),
> + "%02x/%02x", c->x86_vendor, c->x86_model);
> }
>
> /* Now the feature flags better reflect actual CPU features! */
> --- a/xen/arch/x86/cpu/cpu.h
> +++ b/xen/arch/x86/cpu/cpu.h
> @@ -1,10 +1,3 @@
> -
> -struct cpu_model_info {
> - int vendor;
> - int family;
> - char *model_names[16];
> -};
> -
> /* attempt to consolidate cpu attributes */
> struct cpu_dev {
> char * c_vendor;
> @@ -12,11 +5,8 @@ struct cpu_dev {
> /* some have two possibilities for cpuid string */
> char * c_ident[2];
>
> - struct cpu_model_info c_models[4];
> -
> void (*c_init)(struct cpuinfo_x86 * c);
> void (*c_identify)(struct cpuinfo_x86 * c);
> - unsigned int (*c_size_cache)(struct cpuinfo_x86 * c, unsigned int size);
> };
>
> extern struct cpu_dev * cpu_devs [X86_VENDOR_NUM];
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -292,49 +292,10 @@ static void __devinit init_intel(struct
> set_bit(X86_FEATURE_ARAT, c->x86_capability);
> }
>
> -
> -static unsigned int intel_size_cache(struct cpuinfo_x86 * c, unsigned int
> size)
> -{
> - /* Intel PIII Tualatin. This comes in two flavours.
> - * One has 256kb of cache, the other 512. We have no way
> - * to determine which, so we use a boottime override
> - * for the 512kb model, and assume 256 otherwise.
> - */
> - if ((c->x86 == 6) && (c->x86_model == 11) && (size == 0))
> - size = 256;
> - return size;
> -}
> -
> static struct cpu_dev intel_cpu_dev __cpuinitdata = {
> .c_vendor = "Intel",
> .c_ident = { "GenuineIntel" },
> - .c_models = {
> - { .vendor = X86_VENDOR_INTEL, .family = 6, .model_names =
> - {
> - [0] = "Pentium Pro A-step",
> - [1] = "Pentium Pro",
> - [3] = "Pentium II (Klamath)",
> - [4] = "Pentium II (Deschutes)",
> - [5] = "Pentium II (Deschutes)",
> - [6] = "Mobile Pentium II",
> - [7] = "Pentium III (Katmai)",
> - [8] = "Pentium III (Coppermine)",
> - [10] = "Pentium III (Cascades)",
> - [11] = "Pentium III (Tualatin)",
> - }
> - },
> - { .vendor = X86_VENDOR_INTEL, .family = 15, .model_names =
> - {
> - [0] = "Pentium 4 (Unknown)",
> - [1] = "Pentium 4 (Willamette)",
> - [2] = "Pentium 4 (Northwood)",
> - [4] = "Pentium 4 (Foster)",
> - [5] = "Pentium 4 (Foster)",
> - }
> - },
> - },
> .c_init = init_intel,
> - .c_size_cache = intel_size_cache,
> };
>
> int __init intel_cpu_init(void)
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
prev parent reply other threads:[~2012-09-21 12:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-21 11:57 [PATCH] x86: eliminate code affecting only 64-bit-incapable CPUs Jan Beulich
2012-09-21 12:56 ` Keir Fraser [this message]
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