From: Keir Fraser <keir.xen@gmail.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>, xen-devel@lists.xen.org
Cc: Jacob Shin <jacob.shin@amd.com>, Keir Fraser <keir@xen.org>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Jan Beulich <JBeulich@suse.com>
Subject: Re: [PATCH 0 of 2] AMD SR56x0 Erratum 64
Date: Wed, 22 May 2013 13:14:02 +0100 [thread overview]
Message-ID: <CDC2751A.25F49%keir.xen@gmail.com> (raw)
In-Reply-To: <patchbomb.1369217624@andrewcoop.uk.xensource.com>
On 22/05/2013 11:13, "Andrew Cooper" <andrew.cooper3@citrix.com> wrote:
> This is a series of two patches, the first a prerequisite for the second, but
> functionally unrelated.
>
> The first adds readq/writeq for 64bit MMIO, and changes the existing MMIO
> accessors to use explicit bit widths.
>
> The second patch is an errata workaround, suitable for unstable.
>
> A slightly tweaked patch applicable for 4.2 and previously to follow very
> shortly.
Both are fine by me.
Acked-by: Keir Fraser <keir@xen.org>
> ~Andrew
prev parent reply other threads:[~2013-05-22 12:14 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-22 10:13 [PATCH 0 of 2] AMD SR56x0 Erratum 64 Andrew Cooper
2013-05-22 10:13 ` [PATCH 1 of 2] x86: Use explicit widths for MMIO read/write, and add 64bit varients Andrew Cooper
2013-05-22 10:13 ` [PATCH 2 of 2] AMD/iommu: SR56x0 Erratum 64 - Reset all head & tail pointers Andrew Cooper
2013-05-22 12:51 ` Suthikulpanit, Suravee
2013-05-22 12:14 ` Keir Fraser [this message]
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