From mboxrd@z Thu Jan  1 00:00:00 1970
From: Keir Fraser <keir.xen@gmail.com>
Subject: Re: [PATCH v2] x86/HVM: fix x2APIC APIC_ID read
	emulation
Date: Mon, 10 Jun 2013 13:23:14 +0100
Message-ID: <CDDB83C2.290BC%keir.xen@gmail.com>
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To: Jan Beulich <JBeulich@suse.com>, "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Cc: Yangxiaowei <xiaowei.yang@huawei.com>, "keir@xen.org" <keir@xen.org>, Eddie Dong <eddie.dong@intel.com>, Jun Nakajima <jun.nakajima@intel.com>, Wangzhenguo <wangzhenguo@huawei.com>
List-Id: xen-devel@lists.xenproject.org

On 10/06/2013 10:07, "Jan Beulich" <JBeulich@suse.com> wrote:

> APIC and x2APIC have different format for APIC_ID register. Need
> translation.
> 
> Signed-off-by: Zhenguo Wang <wangzhenguo@huawei.com>
> Signed-off-by: Xiaowei Yang <xiaowei.yang@huawei.com>
> 
> Convert code to use switch(), fixing coding style issue at once, and
> use GET_xAPIC_ID() on the value read instead of VLAPIC_ID() (reading
> the field again).
> 
> In the course of this also properly reject both read and writes on the
> non-existing MSR corresponding to APIC_ICR2.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Keir Fraser <keir@xen.org>

> --- a/xen/arch/x86/hvm/vlapic.c
> +++ b/xen/arch/x86/hvm/vlapic.c
> @@ -582,8 +582,19 @@ int hvm_x2apic_msr_read(struct vcpu *v,
>          return 1;
>  
>      vlapic_read_aligned(vlapic, offset, &low);
> -    if ( offset == APIC_ICR )
> +    switch ( offset )
> +    {
> +    case APIC_ID:
> +        low = GET_xAPIC_ID(low);
> +        break;
> +
> +    case APIC_ICR:
>          vlapic_read_aligned(vlapic, APIC_ICR2, &high);
> +        break;
> +
> +    case APIC_ICR2:
> +        return 1;
> +    }
>  
>      *msr_content = (((uint64_t)high) << 32) | low;
>      return 0;
> @@ -837,11 +848,17 @@ int hvm_x2apic_msr_write(struct vcpu *v,
>      if ( !vlapic_x2apic_mode(vlapic) )
>          return X86EMUL_UNHANDLEABLE;
>  
> -    if ( offset == APIC_ICR )
> +    switch ( offset )
>      {
> -        int rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >>
> 32));
> +        int rc;
> +
> +    case APIC_ICR:
> +        rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >> 32));
>          if ( rc )
>              return rc;
> +
> +    case APIC_ICR2:
> +        return X86EMUL_UNHANDLEABLE;
>      }
>  
>      return vlapic_reg_write(v, offset, (uint32_t)msr_content);
> 
> 
>