* Re: [PATCH] hvm/x86: fix x2APIC APIC_ID read emulation
2013-06-09 2:20 [PATCH] hvm/x86: fix x2APIC APIC_ID read emulation Wangzhenguo
@ 2013-06-09 9:19 ` Wei Liu
2013-06-10 9:07 ` [PATCH v2] x86/HVM: " Jan Beulich
1 sibling, 0 replies; 4+ messages in thread
From: Wei Liu @ 2013-06-09 9:19 UTC (permalink / raw)
To: Wangzhenguo; +Cc: Yangxiaowei, wei.liu2, keir@xen.org, xen-devel@lists.xen.org
On Sun, Jun 09, 2013 at 02:20:04AM +0000, Wangzhenguo wrote:
> >From 769b64a379c9b447cf5ad8a6f93560dedeb26f2a Mon Sep 17 00:00:00 2001
> From: Zhenguo Wang <wangzhenguo@huawei.com>
> Date: Sun, 9 Jun 2013 10:08:48 +0800
> Subject: [PATCH] hvm/x86: fix x2APIC APIC_ID read emulation
>
> APIC and x2APIC have different format for APIC_ID register. Need translation.
>
> Signed-off-by: Zhenguo Wang <wangzhenguo@huawei.com>
> Signed-off-by: Xiaowei Yang <xiaowei.yang@huawei.com>
> ---
> xen/arch/x86/hvm/vlapic.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
> index 8c6a7e2..e0f6f06 100644
> --- a/xen/arch/x86/hvm/vlapic.c
> +++ b/xen/arch/x86/hvm/vlapic.c
> @@ -584,6 +584,8 @@ int hvm_x2apic_msr_read(struct vcpu *v, unsigned int msr, uint64_t *msr_content)
> vlapic_read_aligned(vlapic, offset, &low);
> if ( offset == APIC_ICR )
> vlapic_read_aligned(vlapic, APIC_ICR2, &high);
> + else if ( offset == APIC_ID)
^
Style problem. Should add one space before closing parenthesis.
Wei.
> + low = VLAPIC_ID(vlapic);
>
> *msr_content = (((uint64_t)high) << 32) | low;
> return 0;
> --
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH v2] x86/HVM: fix x2APIC APIC_ID read emulation
2013-06-09 2:20 [PATCH] hvm/x86: fix x2APIC APIC_ID read emulation Wangzhenguo
2013-06-09 9:19 ` Wei Liu
@ 2013-06-10 9:07 ` Jan Beulich
2013-06-10 12:23 ` Keir Fraser
1 sibling, 1 reply; 4+ messages in thread
From: Jan Beulich @ 2013-06-10 9:07 UTC (permalink / raw)
To: xen-devel@lists.xen.org
Cc: Yangxiaowei, keir@xen.org, Eddie Dong, Jun Nakajima, Wangzhenguo
[-- Attachment #1: Type: text/plain, Size: 1688 bytes --]
APIC and x2APIC have different format for APIC_ID register. Need
translation.
Signed-off-by: Zhenguo Wang <wangzhenguo@huawei.com>
Signed-off-by: Xiaowei Yang <xiaowei.yang@huawei.com>
Convert code to use switch(), fixing coding style issue at once, and
use GET_xAPIC_ID() on the value read instead of VLAPIC_ID() (reading
the field again).
In the course of this also properly reject both read and writes on the
non-existing MSR corresponding to APIC_ICR2.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -582,8 +582,19 @@ int hvm_x2apic_msr_read(struct vcpu *v,
return 1;
vlapic_read_aligned(vlapic, offset, &low);
- if ( offset == APIC_ICR )
+ switch ( offset )
+ {
+ case APIC_ID:
+ low = GET_xAPIC_ID(low);
+ break;
+
+ case APIC_ICR:
vlapic_read_aligned(vlapic, APIC_ICR2, &high);
+ break;
+
+ case APIC_ICR2:
+ return 1;
+ }
*msr_content = (((uint64_t)high) << 32) | low;
return 0;
@@ -837,11 +848,17 @@ int hvm_x2apic_msr_write(struct vcpu *v,
if ( !vlapic_x2apic_mode(vlapic) )
return X86EMUL_UNHANDLEABLE;
- if ( offset == APIC_ICR )
+ switch ( offset )
{
- int rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >> 32));
+ int rc;
+
+ case APIC_ICR:
+ rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >> 32));
if ( rc )
return rc;
+
+ case APIC_ICR2:
+ return X86EMUL_UNHANDLEABLE;
}
return vlapic_reg_write(v, offset, (uint32_t)msr_content);
[-- Attachment #2: x86-HVM-x2apic-id.patch --]
[-- Type: text/plain, Size: 1728 bytes --]
x86/HVM: fix x2APIC APIC_ID read emulation
APIC and x2APIC have different format for APIC_ID register. Need
translation.
Signed-off-by: Zhenguo Wang <wangzhenguo@huawei.com>
Signed-off-by: Xiaowei Yang <xiaowei.yang@huawei.com>
Convert code to use switch(), fixing coding style issue at once, and
use GET_xAPIC_ID() on the value read instead of VLAPIC_ID() (reading
the field again).
In the course of this also properly reject both read and writes on the
non-existing MSR corresponding to APIC_ICR2.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -582,8 +582,19 @@ int hvm_x2apic_msr_read(struct vcpu *v,
return 1;
vlapic_read_aligned(vlapic, offset, &low);
- if ( offset == APIC_ICR )
+ switch ( offset )
+ {
+ case APIC_ID:
+ low = GET_xAPIC_ID(low);
+ break;
+
+ case APIC_ICR:
vlapic_read_aligned(vlapic, APIC_ICR2, &high);
+ break;
+
+ case APIC_ICR2:
+ return 1;
+ }
*msr_content = (((uint64_t)high) << 32) | low;
return 0;
@@ -837,11 +848,17 @@ int hvm_x2apic_msr_write(struct vcpu *v,
if ( !vlapic_x2apic_mode(vlapic) )
return X86EMUL_UNHANDLEABLE;
- if ( offset == APIC_ICR )
+ switch ( offset )
{
- int rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >> 32));
+ int rc;
+
+ case APIC_ICR:
+ rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >> 32));
if ( rc )
return rc;
+
+ case APIC_ICR2:
+ return X86EMUL_UNHANDLEABLE;
}
return vlapic_reg_write(v, offset, (uint32_t)msr_content);
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
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