Re: [PATCH v8] xen/arm : emulation of arm's PSCI v0.2 standard

[Ian Campbell <Ian.Campbell@citrix.com>]

On Thu, 2014-07-31 at 15:29 +0530, Parth Dixit wrote:
> On 31 July 2014 14:43, Ian Campbell <Ian.Campbell@citrix.com> wrote:
> > On Thu, 2014-07-31 at 12:30 +0530, Parth Dixit wrote:
> >
> >> +    /* affinity values are ignored in this implementation as
> >> +     * at present xen does not supports affinity level greater
> >> +     * than 0, for all  affinity values passed we power down/ standby
> >> +     * the current core */
> >> +    if( power_state & PSCI_0_2_POWER_STATE_TYPE_MASK )
> >> +    {
> >> +        if ( is_32bit_domain(v->domain) )
> >> +            regs->r0 = context_id;
> >> +#ifdef CONFIG_ARM_64
> >> +        else
> >> +            regs->x0 = context_id;
> >> +#endif
> >> +    }
> >> +
> >> +    vcpu_block_unless_event_pending(v);
> >> +    return PSCI_SUCCESS;
> >
> > I'm afraid this is still wrong (well, actually it is wrong but also
> > buggy such that it actually ends up doing the right thing for the wrong
> > reason...).
> >
> > You must do one of two things. Either return to the instruction after
> > the SMC with x0==PSCI_SUCCESS *or* jump to entry_point with x0==context
> > id.
> >
> > Here you are apparently trying to implement something which is neither
> > of these by setting x0==context_id but returning to the instruction
> > after the SMC. It is buggy though because the "return PSCI_SUCCESS" will
> > overwrite your x0 setting.
> >
> > Since Xen doesn't actually do any low power state what we actually want
> > is to return PSCI_SUCCESS to the instruction after the smc in every
> > case, which due to the bug in the above is actually what you have
> > implemented.
> >
> > So, the entire power_state block if block is redundant. This function
> > can just be:
> >
> > +register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point,
> > +                            register_t context_id)
> > +{
> > +    vcpu_block_unless_event_pending(current);
> > +    return PSCI_SUCCESS;
> > +}
> >
> > Does this make sense?
> >
> > Ian.
> >
> ok, but with this we are ignoring the power_state type and defaulting
> always to standby (not retaining context_id) which should be ok
> because caller requests deepest possible state that it can tolerate
> and it is possible to return with shallower state. Also this makes our
> implementation inline with kvm.

ARM says this is OK, it is valid for a request to go to low power to not
be able to do so (pending events, etc) and instead return PSCI_SUCCESS.

ARM also pointed out that since we do not expose any tables with state
ids (there are no DTB bindings for this, and ACPI isn't here yet) no
OSPM should ever be calling us in this mode.

> I will upload it in patchset 9

Thanks,
Ian.