From: Julien Grall <julien.grall@arm.com>
To: Peng Fan <van.freenix@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>,
Stefano Stabellini <sstabellini@kernel.org>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Subject: Re: [PATCH v4 0/7] unsafe big.LITTLE support
Date: Mon, 12 Mar 2018 10:34:08 +0000 [thread overview]
Message-ID: <a2076e8c-06e1-2623-2ca0-0025f83702fd@arm.com> (raw)
In-Reply-To: <20180312023205.GA4034@shlinux2>
On 12/03/18 02:32, Peng Fan wrote:
> On Fri, Mar 09, 2018 at 02:40:25PM +0000, Julien Grall wrote:
>> Hi,
>>
>> On 09/03/18 13:30, Peng Fan wrote:
>>> Hi Julien,
>>> On Fri, Mar 09, 2018 at 10:22:09AM +0000, Julien Grall wrote:
>>>> Hi Peng,
>>>>
>>>> On 09/03/18 09:05, Peng Fan wrote:
>>>>> On Thu, Mar 08, 2018 at 03:13:50PM +0000, Julien Grall wrote:
>>>>>> On 08/03/18 12:43, Peng Fan wrote:
>>>>>> There are a major difference between Dom0 and DomU in your setup.
>>>>>> Dom0 vCPUs are pinned to a specific pCPU, so they can't move around.
>>>>>> For DomU, each vCPU are pinned to a set of pCPUs, so they can move
>>>>>> around.
>>>>>>
>>>>>> But, did you check the DomU has the workaround enabled? I am asking
>>>>>> that because it looks like to me the way to detect the workaround is
>>>>>> based on a device (scu) and not processor. So I am not convinced that
>>>>>> DomU is actually using your workaround.
>>>>>
>>>>> Just checked this. Because xen toolstack create device tree
>>>>> with compatible "compatible = "xen,xenvm-4.10", "xen,xenvm";",
>>>>> but the linux code use "fsl,imx8qm" to detect soc, then call scu
>>>>> to get revision of chip.
>>>>
>>>> But how does the guest call the scu?
>>>
>>> We are doing GPU and display passthrough, also some other IPs passthrough.
>>> we could not totally rely on Dom0 to configure the pinmux, gpio, clk,
>>> relying on dom0 to do that would bring much hack code to our kernel, also
>>> runtime clk set rate in domu could not be done.
>>>
>>> So we expose an interface to domu to directly communicate with SCU(system
>>> control unit).
>>
>> Do you always expect a domain to access the SCU? Even with no
>> passthrough involved?
>
> only needed when a domain only needs to directly access hardware.
Then your suggested workaround can't work for guest with not device
passthrough. I would recommend to find a workaround that works for every
guests.
Cheers,
--
Julien Grall
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prev parent reply other threads:[~2018-03-12 10:34 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-02 19:05 [PATCH v4 0/7] unsafe big.LITTLE support Stefano Stabellini
2018-03-02 19:06 ` [PATCH v4 1/7] xen/arm: Read the dcache line size from CTR register Stefano Stabellini
2018-03-02 19:06 ` [PATCH v4 2/7] xen/arm: Park CPUs with a MIDR different from the boot CPU Stefano Stabellini
2018-03-02 19:06 ` [PATCH v4 3/7] xen/arm: make processor a per cpu variable Stefano Stabellini
2018-03-02 19:06 ` [PATCH v4 4/7] xen/arm: read ACTLR on the pcpu where the vcpu will run Stefano Stabellini
2018-03-02 19:06 ` [PATCH v4 5/7] xen/arm: set VPIDR based on the MIDR value of the underlying pCPU Stefano Stabellini
2018-03-02 19:06 ` [PATCH v4 6/7] xen/arm: update the docs about heterogeneous computing Stefano Stabellini
2018-03-02 19:06 ` [PATCH v4 7/7] xen/arm: disable CPUs with different dcache line sizes Stefano Stabellini
2018-03-06 10:59 ` Julien Grall
2018-03-06 19:41 ` Stefano Stabellini
2018-03-06 10:46 ` [PATCH v4 1/7] xen/arm: Read the dcache line size from CTR register Julien Grall
2018-03-08 6:15 ` [PATCH v4 0/7] unsafe big.LITTLE support Peng Fan
2018-03-08 11:03 ` Julien Grall
2018-03-08 12:23 ` Peng Fan
2018-03-08 12:30 ` Julien Grall
2018-03-08 12:43 ` Peng Fan
2018-03-08 15:13 ` Julien Grall
2018-03-09 9:05 ` Peng Fan
2018-03-09 10:22 ` Julien Grall
2018-03-09 13:30 ` Peng Fan
2018-03-09 14:40 ` Julien Grall
2018-03-10 1:09 ` Stefano Stabellini
2018-03-12 2:57 ` Peng Fan
2018-03-12 11:02 ` Julien Grall
2018-03-12 2:32 ` Peng Fan
2018-03-12 10:34 ` Julien Grall [this message]
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