Re: [PATCH v2 2/3] x86emul: correct handling of FPU insns faulting on memory write

[Boris Ostrovsky <boris.ostrovsky@oracle.com>]

On 03/15/2017 06:28 AM, Jan Beulich wrote:
> When an FPU instruction with a memory destination fails during the
> memory write, it should not affect FPU register state. Due to the way
> we emulate FPU (and SIMD) instructions, we can only guarantee this by
> - backing out changes to the FPU register state in such a case or
> - doing a descriptor read and/or page walk up front, perhaps with the
>   stubs accessing the actual memory location then.
> The latter would require a significant change in how the emulator does
> its guest memory accessing, so for now the former variant is being
> chosen.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Reviewed-by: Kevin Tian <kevin.tian@intel.com>

Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>

with one question:

>  
> @@ -3716,9 +3720,9 @@ x86_emulate(
>          break;
>  
>      case 0x9b:  /* wait/fwait */
> -        fic.insn_bytes = 1;
>          host_and_vcpu_must_have(fpu);
>          get_fpu(X86EMUL_FPU_wait, &fic);
> +        fic.insn_bytes = 1;
>          asm volatile ( "fwait" ::: "memory" );
>          check_fpu_exn(&fic);
>          break;
>


Why is this needed?

-boris

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