From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Oleksii Kurochko <oleksii.kurochko@gmail.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Anthony PERARD <anthony.perard@vates.tech>,
Michal Orzel <michal.orzel@amd.com>,
Julien Grall <julien@xen.org>,
Stefano Stabellini <sstabellini@kernel.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH for-4.22] char/ns16550: bound execution time of ns16550_interrupt()
Date: Thu, 25 Jun 2026 12:08:25 +0200 [thread overview]
Message-ID: <ajz-GVoEG4toMs3P@macbook.local> (raw)
In-Reply-To: <d7920786-7424-4634-80f0-994ea2857d1c@suse.com>
On Wed, Jun 24, 2026 at 10:01:36AM +0200, Jan Beulich wrote:
> On 23.06.2026 17:54, Roger Pau Monné wrote:
> > On Tue, Jun 23, 2026 at 04:27:12PM +0200, Jan Beulich wrote:
> >> On 23.06.2026 16:16, Roger Pau Monné wrote:
> >>> On Tue, Jun 23, 2026 at 03:44:06PM +0200, Jan Beulich wrote:
> >>>> On 23.06.2026 12:31, Roger Pau Monne wrote:
> >>>>> + if ( uart->force_polling )
> >>>>> + return;
> >>>>
> >>>> As the IRQ was disabled, is this even possible? I.e. should this be some
> >>>> kind of assertion or alike?
> >>>
> >>> Hm, I wasn't setting IRQ_DISABLED before, and hence needed this guard.
> >>> But now with IRQ_DISABLED being set in ->status do_IRQ() should filter
> >>> any stray interrupts. I will attempt to add an ASSERT_UNREACHABLE()
> >>> here.
> >>
> >> Simply ASSERT(!uart->force_polling) should do here? It is not wrong to
> >> run the code below in release builds in such an event. If we kept getting
> >> interrupts (perhaps at a high frequency) we'd be in trouble anyway.
> >
> > No, I'm afraid I can't do it like that, I can't put an ASSERT there,
> > because we can still get into ns16550_interrupt() after the interrupt
> > has been disabled. In do_IRQ() we have the following loop:
> >
> > while ( desc->status & IRQ_PENDING )
> > {
> > desc->status &= ~IRQ_PENDING;
> > spin_unlock_irq(&desc->lock);
> >
> > tsc_in = tb_init_done ? get_cycles() : 0;
> > action->handler(irq, action->dev_id);
> > TRACE_TIME(TRC_HW_IRQ_HANDLED, irq, tsc_in, get_cycles());
> >
> > spin_lock_irq(&desc->lock);
> > }
> >
> > So if the device is generating further interrupts in the window with
> > IRQs enabled (while we execute the handler), we will keep looping
> > around this, without taking into account the setting of IRQ_DISABLED.
>
> Ah yes.
>
> > This is something that we might want to fix, so that the loop is bound
> > by IRQ_PENDING being set, and IRQ_DISABLED not, ie:
> >
> > while ( (desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING )
>
> Or perhaps ahead of the loop
>
> desc->status &= ~IRQ_REPLAY;
>
> if ( desc->status & IRQ_DISABLED )
> goto out;
>
> desc->status |= IRQ_PENDING;
>
> /*
> * Since we set PENDING, if another processor is handling a different
> * instance of this same irq, the other processor will take care of it.
> */
> if ( desc->status & IRQ_INPROGRESS )
> goto out;
>
> desc->status |= IRQ_INPROGRESS;
>
> thus also having the comment no longer describe only part of the conditional.
I think this is racy. An interrupt hitting in the window with
interrupts enabled ahead of the handler having set IRQ_DISABLED will
still set IRQ_PENDING, and thus the loop would get executed a further
time, and the handler called after IRQ_DISABLED having been set.
I think we need an extra condition in the loop, I see no way this can
be solved only by dealing with the concurrent setting of IRQ_PENDING.
Thanks, Roger.
next prev parent reply other threads:[~2026-06-25 10:08 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-23 10:31 [PATCH for-4.22] char/ns16550: bound execution time of ns16550_interrupt() Roger Pau Monne
2026-06-23 13:36 ` Oleksii Kurochko
2026-06-23 13:46 ` Jan Beulich
2026-06-23 14:19 ` Roger Pau Monné
2026-06-23 13:44 ` Jan Beulich
2026-06-23 14:16 ` Roger Pau Monné
2026-06-23 14:27 ` Jan Beulich
2026-06-23 15:54 ` Roger Pau Monné
2026-06-24 8:01 ` Jan Beulich
2026-06-25 10:08 ` Roger Pau Monné [this message]
2026-06-25 11:31 ` Jan Beulich
2026-06-25 13:07 ` Roger Pau Monné
2026-06-25 14:32 ` Jan Beulich
2026-06-25 15:35 ` Roger Pau Monné
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