Re: [PATCH 4/4] arm: traps: handle SMC32 in check_conditional_instr()

[Julien Grall <julien.grall@arm.com>]

On 08/08/17 21:42, Volodymyr Babchuk wrote:
> Hi Julien,

Hi Volodymyr,

> On 28.07.17 23:37, Julien Grall wrote:
>> Hi,
>>
>> On 07/28/2017 08:43 PM, Volodymyr Babchuk wrote:
>>> On ARMv8 architecture SMC instruction in aarch32 state can be
>>> conditional.
>>
>> version + paragraph please.
>>
>> Also, ARMv8 supports both AArch32 and AArch64. As I said in my answer
>> on "arm: smccc: handle SMCs/HVCs according to SMCCC" ([1]), This field
>> exists for both architecture. I really don't want to tie the 32-bit
>> port to ARMv7. We should be able to use ARMv8 too.
> Not sure if I got this.
>
> My ARM 7 ARM (ARM DDI 0406C.c ID051414 page B3-1431) say following:
>
> "SMC instructions cannot be trapped if they fail their condition code
> check.
> Therefore, the syndrome information for this exception does not include
> conditionality information."
>
> ARMv8 ARM (ARM DDI 0487A.k ID092916) says that SMC from aarch32 state can
> be conditional and my patch checks this. But SMC from aarch64 state is
> unconditional, so there are nothing to check. At least, when looking at
> ISS encoding, i see imm16 field and RES0 field. No conditional flags.

ARM 32-bit is not only ARMv7, it could also be ARMv8. If you look at 
Part G describing the AArch32 state, specifically G1-4434, "The ARMv8-A 
architecture permits, but does not require, this trap to apply to 
conditional SMC instructions that fail their Condition code check...".

Xen ARM 32-bits should be able to boot any 32-bit ARM platform (ARMv7, 
ARMv8). But your #ifdef belows prevent that.

Cheers,

-- 
Julien Grall

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