From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>,
xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v2 15/16] x86/PV: use generic emulator for privileged instruction handling
Date: Thu, 29 Sep 2016 22:06:22 +0100 [thread overview]
Message-ID: <b3b5423b-090a-eaae-a250-3b9f1e56151e@citrix.com> (raw)
In-Reply-To: <57EB98FE020000780011320F@prv-mh.provo.novell.com>
On 28/09/16 09:18, Jan Beulich wrote:
> There's a new emulator return code being added to allow bypassing
> certain operations (see the code comment). Its handling in the epilogue
> code involves moving the raising of the single step trap until after
> registers were updated. This should probably have been that way from
> the beginning, to allow the inject_hw_exception() hook to see updated
> register state (in case it cares) - it's a trap, after all.
I agree. (However, given the complexity of this patch, it really would
be better to split changes like the #DB handling out into a separate patch).
>
> The other small tweak to the emulator is to single iteration handling
> of INS and OUTS: Since we don't want to handle any other memory access
> instructions, we want these to be handled by the rep_ins() / rep_outs()
> hooks here too. The read() / write() hook pointers get checked for that
> purpose.
Moving the non-rep INS/OUTS instructions into rep_ins/outs() (perhaps
with dropping the rep_ prefix from the callback names) seems sensible.
However, making this implicit on a check against the read/write hooks
doesn't seem sensible. Anyone looking at the code is going to get
thoroughly confused.
Can't we make the ins/outs hook deal properly with a rep of 1, and have
x86_emulate() know not to update %ecx in this case?
>
> And finally handling of exceptions gets changed for REP INS / REP OUTS:
> If the hook return X86EMUL_EXCEPTION, register state will still get
> updated if some iterations have been performed (but the rIP update will
> get suppressed if not all of them did get handled).
Isn't this what happens on real hardware anyway?
> While on the HVM side
> the VA -> LA -> PA translation process clips the number of repetitions,
> doing so would unduly complicate the PV side code being added here.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> One thing to be considered is that despite avoiding the handling of
> memory reads and writes (other than for INS and OUTS) the set of insns
> now getting potentially handled by the emulator is much larger than
> before. A possible solution to this would be a new hook to be called
> between decode and execution stages, allowing further restrictions to
> be enforced. Of course this could easily be a follow-up patch, as the
> one here is quite big already.
I think this would be a very sensible precaution. I would suggest even
that this patch doesn't get committed without being adjacent to such a
patch.
>
> Another thing to consider is to the extend the X86EMUL_EXCEPTION
> handling change mentioned above to other string instructions. In that
> case this should probably be broken out into a prereq patch.
Yes.
~Andrew
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next prev parent reply other threads:[~2016-09-29 21:06 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-28 7:59 [PATCH v2 00/16] x86: split insn emulator decode and execution Jan Beulich
2016-09-28 8:06 ` [PATCH v2 01/16] x86emul: split instruction decoding from execution Jan Beulich
2016-09-28 16:24 ` Andrew Cooper
2016-09-28 8:07 ` [PATCH v2 02/16] x86emul: fetch all insn bytes during the decode phase Jan Beulich
2016-09-28 16:37 ` Andrew Cooper
2016-09-28 8:08 ` [PATCH v2 03/16] x86emul: track only rIP in emulator state Jan Beulich
2016-09-28 16:41 ` Andrew Cooper
2016-09-28 8:08 ` [PATCH v2 04/16] x86emul: complete decoding of two-byte instructions Jan Beulich
2016-09-28 17:22 ` Andrew Cooper
2016-09-29 6:37 ` Jan Beulich
2016-09-28 8:09 ` [PATCH v2 05/16] x86emul: add XOP decoding Jan Beulich
2016-09-29 9:07 ` Andrew Cooper
2016-09-28 8:10 ` [PATCH v2 06/16] x86emul: add EVEX decoding Jan Beulich
2016-09-29 9:08 ` Andrew Cooper
2016-09-28 8:12 ` [PATCH v2 07/16] x86emul: generate and make use of a canonical opcode representation Jan Beulich
2016-09-29 10:11 ` Andrew Cooper
2016-09-28 8:13 ` [PATCH v2 08/16] SVM: use generic instruction decoding Jan Beulich
2016-09-29 19:24 ` Andrew Cooper
2016-09-29 19:30 ` Andrew Cooper
2016-09-30 8:32 ` Jan Beulich
2016-09-28 8:13 ` [PATCH v2 09/16] x86/32on64: use generic instruction decoding for call gate emulation Jan Beulich
2016-09-29 19:47 ` Andrew Cooper
2016-09-30 7:30 ` Jan Beulich
2016-09-28 8:14 ` [PATCH v2 10/16] x86/PV: split out dealing with CRn from privileged instruction handling Jan Beulich
2016-09-29 20:01 ` Andrew Cooper
2016-09-30 7:12 ` Jan Beulich
2016-09-28 8:15 ` [PATCH v2 11/16] x86/PV: split out dealing with DRn " Jan Beulich
2016-09-29 20:13 ` Andrew Cooper
2016-09-30 7:16 ` Jan Beulich
2016-09-28 8:16 ` [PATCH v2 12/16] x86/PV: split out dealing with MSRs " Jan Beulich
2016-09-29 20:44 ` Andrew Cooper
2016-09-28 8:17 ` [PATCH v2 13/16] x86emul: support XSETBV Jan Beulich
2016-09-29 20:45 ` Andrew Cooper
2016-09-30 8:05 ` Jan Beulich
2016-09-28 8:18 ` [PATCH v2 14/16] x86emul: sort opcode 0f01 special case switch() statement Jan Beulich
2016-09-29 20:46 ` Andrew Cooper
2016-09-28 8:18 ` [PATCH v2 15/16] x86/PV: use generic emulator for privileged instruction handling Jan Beulich
2016-09-29 21:06 ` Andrew Cooper [this message]
2016-09-30 8:55 ` Jan Beulich
2016-09-28 8:19 ` [PATCH v2 16/16] x86emul: don't assume a memory operand Jan Beulich
2016-09-29 21:12 ` Andrew Cooper
2016-09-30 8:25 ` Jan Beulich
2016-09-28 8:42 ` [PATCH v2 00/16] x86: split insn emulator decode and execution Jan Beulich
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