From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v10 06/11] x86/entry: Organise the clobbering of the RSB/RAS on entry to Xen
Date: Thu, 25 Jan 2018 14:17:32 +0000 [thread overview]
Message-ID: <b75097c9-3f63-2728-db30-37a17b890dcc@citrix.com> (raw)
In-Reply-To: <5A69E75C02000078001A25EE@prv-mh.provo.novell.com>
On 25/01/18 13:19, Jan Beulich wrote:
>>>> On 24.01.18 at 14:12, <andrew.cooper3@citrix.com> wrote:
>> --- a/xen/include/asm-x86/spec_ctrl_asm.h
>> +++ b/xen/include/asm-x86/spec_ctrl_asm.h
>> @@ -74,6 +74,43 @@
>> * - SPEC_CTRL_EXIT_TO_GUEST
>> */
>>
>> +.macro DO_OVERWRITE_RSB
>> +/*
>> + * Requires nothing
>> + * Clobbers %rax, %rcx
>> + *
>> + * Requires 256 bytes of stack space, but %rsp has no net change. Based on
>> + * Google's performance numbers, the loop is unrolled to 16 iterations and two
>> + * calls per iteration.
>> + *
>> + * The call filling the RSB needs a nonzero displacement. A nop would do, but
>> + * we use "1: pause, jmp 1b" to safely contains any ret-based speculation,
>> + * even if the loop is speculatively executed prematurely.
>> + *
>> + * %rsp is preserved by using an extra GPR because a) we've got plenty spare,
>> + * b) the two movs are shorter to encode than `add $32*8, %rsp`, and c) can be
>> + * optimised with mov-elimination in modern cores.
>> + */
>> + mov $16, %ecx /* 16 iterations, two calls per loop */
>> + mov %rsp, %rax /* Store the current %rsp */
>> +
>> +.L\@_fill_rsb_loop:
>> +
>> + .irp n, 1, 2 /* Unrolled twice. */
>> + call .L\@_insert_rsb_entry_\n /* Create an RSB entry. */
>> +
>> +.L\@_capture_speculation_\n:
>> + pause
>> + jmp .L\@_capture_speculation_\n /* Capture rogue speculation. */
> Have you seen Linux commit 28d437d550e1e39f805d99f9f8ac399c778827b7
> ("x86/retpoline: Add LFENCE to the retpoline/RSB filling RSB
> macros")?
I saw the patch, but hadn't realised it had gone in. There was quite a
long discussion.
> I think we want to have the same, to please AMD. I'd
> suggest to use alternative patching though (except again on the
> IST paths), but then again maybe in a follow-up patch.
I trust the later patches are suitable in the IST regard?
~Andrew
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next prev parent reply other threads:[~2018-01-25 14:17 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-24 13:12 [PATCH v10 00/11] x86: Mitigations for SP2/CVE-2017-5715/Branch Target Injection Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 01/11] x86/cpuid: Handling of IBRS/IBPB, STIBP and IBRS for guests Andrew Cooper
2018-02-01 9:06 ` Jan Beulich
2018-02-01 13:53 ` Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 02/11] x86/msr: Emulation of MSR_{SPEC_CTRL, PRED_CMD} " Andrew Cooper
2018-01-25 12:25 ` Jan Beulich
2018-01-24 13:12 ` [PATCH v10 03/11] x86/migrate: Move MSR_SPEC_CTRL on migrate Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 04/11] x86/hvm: Permit guests direct access to MSR_{SPEC_CTRL, PRED_CMD} Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 05/11] x86/entry: Organise the use of MSR_SPEC_CTRL at each entry/exit point Andrew Cooper
2018-01-25 13:08 ` Jan Beulich
2018-01-25 14:12 ` Andrew Cooper
2018-01-25 14:36 ` Jan Beulich
2018-01-25 14:46 ` Andrew Cooper
2018-01-25 15:08 ` Jan Beulich
2018-01-25 15:10 ` Andrew Cooper
2018-01-25 16:52 ` [PATCH v11 5/11] " Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 06/11] x86/entry: Organise the clobbering of the RSB/RAS on entry to Xen Andrew Cooper
2018-01-25 13:19 ` Jan Beulich
2018-01-25 14:17 ` Andrew Cooper [this message]
2018-01-25 14:40 ` Jan Beulich
2018-01-25 14:44 ` Andrew Cooper
2018-01-25 14:48 ` Jan Beulich
2018-01-25 16:54 ` [PATCH v11 6/11] " Andrew Cooper
2018-01-26 12:17 ` Jan Beulich
2018-01-24 13:12 ` [PATCH v10 07/11] x86/entry: Avoid using alternatives in NMI/#MC paths Andrew Cooper
2018-01-25 13:43 ` Jan Beulich
2018-01-25 15:04 ` Andrew Cooper
2018-01-25 15:14 ` Jan Beulich
2018-01-25 15:19 ` Andrew Cooper
2018-01-25 16:17 ` Jan Beulich
2018-01-25 17:21 ` [PATCH v11 7/11] " Andrew Cooper
2018-01-26 12:23 ` Jan Beulich
2018-01-26 12:28 ` Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 08/11] x86/boot: Calculate the most appropriate BTI mitigation to use Andrew Cooper
2018-01-25 13:52 ` Jan Beulich
2018-02-01 8:41 ` Jan Beulich
2018-02-01 13:58 ` Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 09/11] x86/ctxt: Issue a speculation barrier between vcpu contexts Andrew Cooper
2018-01-24 13:34 ` Woodhouse, David
2018-01-24 13:49 ` Andrew Cooper
2018-01-24 14:31 ` David Woodhouse
2018-01-25 14:46 ` Konrad Rzeszutek Wilk
2018-01-25 15:57 ` Jan Beulich
2018-01-25 16:09 ` Andrew Cooper
2018-01-25 16:15 ` Andrew Cooper
2018-01-27 1:27 ` Dario Faggioli
2018-01-29 9:28 ` Jan Beulich
2018-02-05 11:37 ` George Dunlap
2018-01-25 16:31 ` Jan Beulich
2018-01-25 16:48 ` Andrew Cooper
2018-01-25 18:49 ` Dario Faggioli
2018-01-26 1:08 ` Dario Faggioli
2018-01-26 9:43 ` Jan Beulich
2018-01-26 11:13 ` Dario Faggioli
2018-01-26 11:38 ` Jan Beulich
2018-01-24 13:12 ` [PATCH v10 10/11] x86/cpuid: Offer Indirect Branch Controls to guests Andrew Cooper
2018-01-24 13:12 ` [PATCH v10 11/11] x86/idle: Clear SPEC_CTRL while idle Andrew Cooper
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