From: Razvan Cojocaru <rcojocaru@bitdefender.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>,
Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, sstabellini@kernel.org,
jun.nakajima@intel.com, xen-devel@lists.xen.org,
julien.grall@arm.com, tamas@tklengyel.com,
suravee.suthikulpanit@amd.com, boris.ostrovsky@oracle.com
Subject: Re: [PATCH V2] x86/vm_event: Added support for VM_EVENT_REASON_INTERRUPT
Date: Thu, 10 Nov 2016 18:03:16 +0200 [thread overview]
Message-ID: <c8d92cf8-cf6f-035e-105c-49d2621a85a7@bitdefender.com> (raw)
In-Reply-To: <40389432-b931-4c07-5251-45e855ca0ba0@citrix.com>
On 11/10/2016 05:59 PM, Andrew Cooper wrote:
>>>> @ -259,6 +266,14 @@ struct vm_event_cpuid {
>>>> >>> uint32_t _pad;
>>>> >>> };
>>>> >>>
>>>> >>> +struct vm_event_interrupt_x86 {
>>>> >>> + uint32_t vector;
>>>> >>> + uint32_t type;
>>>> >>> + uint32_t error_code;
>>>> >>> + uint64_t cr2;
>>>> >>> + uint32_t _pad;
>>>> >>> +};
>>> >> I'm pretty certain this is not what you want, as this make the layout
>>> >> vary between 32-bit (compat) and 64-bit (native) callers.
>> > I'll remove the _pad.
> You need to invert the pad and cr2, so cr2 starts at 16 bytes into the
> structure.
>
> Remember that uint64_t has 8 byte alignment in 64bit, but only 4 byte
> alignment in 32bit.
Right, it's been a long day. :) Thanks, I'll do that.
Thanks,
Razvan
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prev parent reply other threads:[~2016-11-10 16:03 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-10 8:35 [PATCH V2] x86/vm_event: Added support for VM_EVENT_REASON_INTERRUPT Razvan Cojocaru
2016-11-10 13:11 ` Tamas K Lengyel
2016-11-10 13:33 ` Razvan Cojocaru
2016-11-10 13:41 ` Julien Grall
2016-11-10 13:43 ` Razvan Cojocaru
2016-11-10 16:01 ` Tamas K Lengyel
2016-11-10 16:08 ` Razvan Cojocaru
2016-11-10 16:21 ` Razvan Cojocaru
2016-11-10 14:25 ` Boris Ostrovsky
2016-11-10 14:33 ` Razvan Cojocaru
2016-11-10 15:41 ` Jan Beulich
2016-11-10 15:47 ` Jan Beulich
2016-11-10 15:53 ` Razvan Cojocaru
2016-11-10 15:59 ` Andrew Cooper
2016-11-10 16:03 ` Razvan Cojocaru [this message]
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