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bh=D9h8NqKPbXOk0n+m3x7gD/9twF1D1vVmvxEUaxrs3nQ=; b=sQaH65UYdbb1Wken+mPZfvqmijCdpAg1s1mFE+aNs4W8C9Ky0lmNksSCVnDsnZLepZwrWwqZW6gSGSqIDPEFcBInKgPwG73zy4fVrk6m2Y/lZy5NH3LZNopYecU5JHj17z5WzYsRQ8wYGYqrYGxakpVEvyrox6jBLaLUV2yc2p0= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: Date: Thu, 20 Aug 2026 09:13:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/4] xen/arm: add i.MX8M platform support To: Wig Cheng , CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , "Volodymyr Babchuk" , John Ernberg , Peng Fan References: <20260819152821.3361898-1-onlywig@gmail.com> <20260819152821.3361898-4-onlywig@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260819152821.3361898-4-onlywig@gmail.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 51odEQQCWbNXyfkWi5vAQ/E4QX8oHvjnanX2i0flbLGoXMY2+g3TnhVi+YxTIt5KyDzm9nVtyri/4I3Ob5GRY41+Dm6K6UoXB1YkKnZaOOYnp8Cu7WywDEiO21SFOMwcSeGFd9Xyvotq++SAdKisbeT2fje76y1DqqtevSyUYM5Nrh5TMG+adxVeBCbPRle0lkg7B6umjkgAGO9hWLeH4y8IwkwkkVlqtW1bR/U0oQJpp51dSC0ANKLMiOiQTaho36nUPgc4YzEL6v1oSqV+9XaIXndggd18SlmU7NBGuYU1F3Yqj1Bvn9N5jjvh7zq4CEiMC2hNfqAgzvP+ns3RwJ24I5Kct2Qf/kGMraXoAdLEG3GJuXBKc2OEO5UVe5SBP4/KwKDJhCObRPy3xeU/c7daXD0QO+UB7iOzI9Kgn/K0woMuNG6vUnhX0OUle/3l X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Aug 2026 07:13:41.6539 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f870b918-544c-4756-402a-08defe8a9096 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000066E8.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9280 X-purgate-ID: tlsNG-16d1c6/1787210028-F7ACA77B-0BBD3E8F/0/0 X-purgate-type: clean X-purgate-size: 6775 On 19-Aug-26 17:28, Wig Cheng wrote: > Add platform glue for the NXP i.MX8M family (i.MX8MP/MQ/MM/MN). > > When Linux is used as dom0 a number of drivers make SiP SMC calls into > TF-A to manage hardware: GPC power domains, SRC (M-core remoteproc), > SoC info and NoC QoS. There is no public specification for these > calls; the function IDs and their subfunctions are taken from the > vendor kernel call sites. > > Forward only the specific subfunctions the hardware domain issues, > following the whitelist model of the i.MX8QM platform. Each service > with a fixed set of subfunctions (GPC, SRC, NoC) filters them with an > explicit switch on the subfunction id, and the SoC info call is a > read-only query. CPU and DRAM frequency scaling are denied because > the hardware domain cannot make an informed decision about resources > shared with the other domains, and any unknown function ID is > rejected. > > Signed-off-by: Wig Cheng > Reviewed-by: Michal Orzel > --- > Changes in v4: > - SRC and NoC: filter the subfunction id with an explicit switch that > lists each accepted subfunction, instead of a range check. > - NoC: accept only the QoS priority subfunction; the LCDIF subfunction > has no caller in the vendor kernel. Note that i.MX8MP issues no NoC > call at boot (only i.MX8MQ does). > - Print the subfunction id as well when rejecting an unknown function > id. > - Picked up Michal's Reviewed-by. > > xen/arch/arm/platforms/Makefile | 1 + > xen/arch/arm/platforms/imx8m.c | 161 ++++++++++++++++++++++++++++++++ > 2 files changed, 162 insertions(+) > create mode 100644 xen/arch/arm/platforms/imx8m.c > > diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile > index bec6e55d1f..cdf936c50d 100644 > --- a/xen/arch/arm/platforms/Makefile > +++ b/xen/arch/arm/platforms/Makefile > @@ -9,6 +9,7 @@ obj-$(CONFIG_ALL_PLAT) += sunxi.o > obj-$(CONFIG_ALL64_PLAT) += thunderx.o > obj-$(CONFIG_ALL64_PLAT) += xgene-storm.o > obj-$(CONFIG_ALL64_PLAT) += brcm-raspberry-pi.o > +obj-$(CONFIG_ALL64_PLAT) += imx8m.o > obj-$(CONFIG_ALL64_PLAT) += imx8qm.o > obj-$(CONFIG_MPSOC_PLATFORM) += xilinx-zynqmp.o > obj-$(CONFIG_MPSOC_PLATFORM) += xilinx-zynqmp-eemi.o > diff --git a/xen/arch/arm/platforms/imx8m.c b/xen/arch/arm/platforms/imx8m.c > new file mode 100644 > index 0000000000..ad76935f5d > --- /dev/null > +++ b/xen/arch/arm/platforms/imx8m.c > @@ -0,0 +1,161 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * i.MX 8M family setup > + * > + * Copyright 2026 Open-EP (E-Paper) Community > + */ > + > +#include > +#include > +#include > +#include > + > +static const char * const imx8m_dt_compat[] __initconst = > +{ > + "fsl,imx8mp", > + "fsl,imx8mq", > + "fsl,imx8mm", > + "fsl,imx8mn", > + NULL > +}; > + > +#define IMX_SIP_FID(fid) \ > + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ > + ARM_SMCCC_CONV_64, \ > + ARM_SMCCC_OWNER_SIP, \ > + (fid)) > + > +/* > + * SiP SMC function IDs used by the i.MX8M Linux drivers. There is no > + * public specification for these; the IDs and their subfunctions are > + * extracted from the vendor kernel call sites (see drivers/soc/imx, > + * drivers/devfreq, drivers/remoteproc). > + */ > +#define IMX_SIP_F_GPC 0x0 /* GPC power-domain control */ > +#define IMX_SIP_F_CPUFREQ 0x1 /* CPU frequency scaling */ > +#define IMX_SIP_F_DDR_DVFS 0x4 /* DRAM frequency scaling */ > +#define IMX_SIP_F_SRC 0x5 /* SRC: M-core remoteproc start/stop */ > +#define IMX_SIP_F_SOC_INFO 0x6 /* read-only SoC info query */ > +#define IMX_SIP_F_NOC 0x8 /* NoC QoS priority setup */ > + > +#define IMX_SIP_GPC_SF_PM_DOMAIN 0x03 > + > +#define IMX_SIP_SRC_SF_M4_START 0x00 > +#define IMX_SIP_SRC_SF_M4_STARTED 0x01 > +#define IMX_SIP_SRC_SF_M4_STOP 0x02 > + > +#define IMX_SIP_NOC_SF_PRIORITY 0x01 > + > +static bool imx8m_smc(struct cpu_user_regs *regs) > +{ > + uint32_t function_id = get_user_reg(regs, 0); > + uint32_t subfunction_id = get_user_reg(regs, 1); > + struct arm_smccc_res res; > + > + if ( !cpus_have_const_cap(ARM_SMCCC_1_1) ) > + { > + printk_once(XENLOG_WARNING > + "imx8m: smc: no SMCCC 1.1 support. Disabling firmware calls\n"); > + > + return false; > + } > + > + /* Only the hardware domain may use the SiP calls */ > + if ( !is_hardware_domain(current->domain) ) > + { > + gprintk(XENLOG_WARNING, "imx8m: smc: No access\n"); > + return false; > + } > + > + /* > + * Forward only the subfunctions the dom0 kernel actually issues. All > + * of these manage hardware that belongs to the hardware domain (power > + * domains, M-core, NoC) or are read-only queries. > + */ > + switch ( function_id ) > + { > + case IMX_SIP_FID(IMX_SIP_F_GPC): > + if ( subfunction_id != IMX_SIP_GPC_SF_PM_DOMAIN ) > + return false; > + break; > + > + /* > + * CPU and DRAM frequency scaling: the hardware domain does not see the > + * whole system and cannot make an informed decision about resources > + * shared with the other domains, so deny both (CPU frequency scaling > + * is denied on the i.MX8QM platform for the same reason). > + */ > + case IMX_SIP_FID(IMX_SIP_F_CPUFREQ): > + case IMX_SIP_FID(IMX_SIP_F_DDR_DVFS): > + return false; > + > + case IMX_SIP_FID(IMX_SIP_F_SRC): > + /* SRC: M-core remoteproc start, poll-started and stop. */ > + switch ( subfunction_id ) > + { > + case IMX_SIP_SRC_SF_M4_START: > + case IMX_SIP_SRC_SF_M4_STARTED: > + case IMX_SIP_SRC_SF_M4_STOP: > + break; > + > + default: > + return false; > + } > + break; > + > + case IMX_SIP_FID(IMX_SIP_F_SOC_INFO): > + break; > + > + case IMX_SIP_FID(IMX_SIP_F_NOC): > + /* > + * NoC QoS priority setup. Only i.MX8MQ issues this at boot; > + * i.MX8MP issues no NoC call, but the platform covers both. > + */ > + switch ( subfunction_id ) > + { > + case IMX_SIP_NOC_SF_PRIORITY: No need for a switch for a single case. This can be simplified the same way as you did for IMX_SIP_GPC_SF_PM_DOMAIN i.e.: if ( subfunction_id != IMX_SIP_NOC_SF_PRIORITY ) return false; break; I'll fix on commit. Thanks for the series. I'll commit it shortly. ~Michal