From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dan Magenheimer Subject: RE: A clocksource question Date: Wed, 10 Mar 2010 16:44:23 -0800 (PST) Message-ID: References: <4B962748.90609@invisiblethingslab.com> <4B96DB69.10101@goop.org> <4B981997.4030605@invisiblethingslab.com> <56cc3abf-21f6-4178-b00e-0331538080d9@default 4FA716B1526C7C4DB0375C6DADBC4EA3554D53F1B0@LONPMAILBOX01.citrite.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <4FA716B1526C7C4DB0375C6DADBC4EA3554D53F1B0@LONPMAILBOX01.citrite.net> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Ian Pratt , Joanna Rutkowska , Jeremy Fitzhardinge Cc: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org > From: Ian Pratt [mailto:Ian.Pratt@eu.citrix.com] > Sent: Wednesday, March 10, 2010 5:22 PM > To: Dan Magenheimer; Joanna Rutkowska; Jeremy Fitzhardinge > Cc: Ian Pratt; xen-devel@lists.xensource.com > Subject: RE: [Xen-devel] A clocksource question >=20 > > The TSC delta is troubling... if you hadn't said you had turned > > off all power management, I would have guessed a problem with > > C-state management. Maybe Xen is discovering some power management > > capability not visible in BIOS settings? >=20 > Xen uses the architectural C state mechanism, bypassing ACPI. > Use "max_cstate=3D0" Yes! The Core 2 Duo fooled me. There are some versions of Core 2 Duo ("Conroe") that don't support C3-state and some ("Merom") that do support C3-state. And the code to "recover" from C3, which I think was added before 3.4 was released, has been observed to be very poor in its attempt to reset TSC after C3 to a reasonable value. I didn't think it was THAT poor though! See: http://lists.xensource.com/archives/html/xen-devel/2009-10/msg01414.html=20 (AFAIK, this is not fixed in 4.0, though the new default rdtsc emulation may mask the problem by ensuring TSC always moves forward, even across different processors.) So that may explain the TSC delta. Since the pv clocksource algorithm is dependent in part on the hardware TSC being synced reasonably well by Xen, that may also explain other clock strangeness. P.S. Joanna -- max_cstate=3D0 must be specified on the Xen boot line in grub.conf, not in the vm.cfg or grub.conf of the guest.