From: Julien Grall <julien.grall@arm.com>
To: Andre Przywara <andre.przywara@linaro.org>,
Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org
Subject: Re: [PATCH 45/57] ARM: new VGIC: Handle hardware mapped IRQs
Date: Fri, 9 Mar 2018 17:27:38 +0000 [thread overview]
Message-ID: <e1de6a74-a9ee-290c-a5a3-4fb7653589b4@arm.com> (raw)
In-Reply-To: <20180305160415.16760-46-andre.przywara@linaro.org>
Hi Andre,
On 05/03/18 16:04, Andre Przywara wrote:
> The VGIC supports virtual IRQs to be connected to a hardware IRQ, so
> when a guest EOIs the virtual interrupt, it affects the state of that
> corresponding interrupt on the hardware side at the same time.
> Implement the interface that the Xen arch/core code expects to connect
> the virtual and the physical world.
>
> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Cheers,
> ---
> Changelog RFC ... v1:
> - add ASSERT for hardware mapped IRQs being SPI only
> - check h/w IRQ matches before disconnecting
>
> xen/arch/arm/vgic/vgic.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 71 insertions(+)
>
> diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c
> index 5246d7c2e7..5bbf55da21 100644
> --- a/xen/arch/arm/vgic/vgic.c
> +++ b/xen/arch/arm/vgic/vgic.c
> @@ -698,6 +698,77 @@ void vgic_kick_vcpus(struct domain *d)
> }
> }
>
> +struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v,
> + unsigned int virq)
> +{
> + struct irq_desc *desc = NULL;
> + struct vgic_irq *irq = vgic_get_irq(d, v, virq);
> + unsigned long flags;
> +
> + if ( !irq )
> + return NULL;
> +
> + spin_lock_irqsave(&irq->irq_lock, flags);
> + if ( irq->hw )
> + {
> + ASSERT(irq->hwintid >= VGIC_NR_PRIVATE_IRQS);
> + desc = irq_to_desc(irq->hwintid);
> + }
> + spin_unlock_irqrestore(&irq->irq_lock, flags);
> +
> + vgic_put_irq(d, irq);
> +
> + return desc;
> +}
> +
> +/*
> + * was:
> + * int kvm_vgic_map_phys_irq(struct vcpu *vcpu, u32 virt_irq, u32 phys_irq)
> + * int kvm_vgic_unmap_phys_irq(struct vcpu *vcpu, unsigned int virt_irq)
> + */
> +int vgic_connect_hw_irq(struct domain *d, struct vcpu *vcpu,
> + unsigned int virt_irq, struct irq_desc *desc,
> + bool connect)
> +{
> + struct vgic_irq *irq = vgic_get_irq(d, vcpu, virt_irq);
> + unsigned long flags;
> + int ret = 0;
> +
> + if ( !irq )
> + return -EINVAL;
> +
> + spin_lock_irqsave(&irq->irq_lock, flags);
> +
> + if ( connect ) /* assign a mapped IRQ */
> + {
> + /* The VIRQ should not be already enabled by the guest */
> + if ( !irq->hw && !irq->enabled )
> + {
> + irq->hw = true;
> + irq->hwintid = desc->irq;
> + }
> + else
> + ret = -EBUSY;
> + }
> + else /* remove a mapped IRQ */
> + {
> + if ( desc && irq->hwintid != desc->irq )
> + {
> + ret = -EINVAL;
> + }
> + else
> + {
> + irq->hw = false;
> + irq->hwintid = 0;
> + }
> + }
> +
> + spin_unlock_irqrestore(&irq->irq_lock, flags);
> + vgic_put_irq(d, irq);
> +
> + return ret;
> +}
> +
> static unsigned int translate_irq_type(bool is_level)
> {
> return is_level ? IRQ_TYPE_LEVEL_HIGH : IRQ_TYPE_EDGE_RISING;
>
--
Julien Grall
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Xen-devel@lists.xenproject.org
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next prev parent reply other threads:[~2018-03-09 17:27 UTC|newest]
Thread overview: 146+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-05 16:03 [PATCH 00/57] New VGIC(-v2) implementation Andre Przywara
2018-03-05 16:03 ` [PATCH 01/57] tools: ARM: vGICv3: Avoid inserting optional DT properties Andre Przywara
2018-03-05 16:39 ` Julien Grall
2018-03-05 17:18 ` Wei Liu
2018-03-06 11:16 ` Julien Grall
2018-03-05 16:03 ` [PATCH 02/57] ARM: vGICv3: clarify on GUEST_GICV3_RDIST_REGIONS symbol Andre Przywara
2018-03-05 16:40 ` Julien Grall
2018-03-05 16:03 ` [PATCH 03/57] ARM: GICv3: use hardware GICv3 redistributor values for Dom0 Andre Przywara
2018-03-05 16:44 ` Julien Grall
2018-03-05 16:03 ` [PATCH 04/57] ARM: GICv3: simplify GICv3 redistributor stride handling Andre Przywara
2018-03-05 17:08 ` Julien Grall
2018-03-06 13:49 ` Julien Grall
2018-03-08 12:40 ` Andre Przywara
2018-03-08 15:29 ` Julien Grall
2018-03-05 16:03 ` [PATCH 05/57] ARM: vGICv3: always use architected redist stride Andre Przywara
2018-03-05 16:03 ` [PATCH 06/57] ARM: vGICv3: remove rdist_stride from VGIC structure Andre Przywara
2018-03-05 16:03 ` [PATCH 07/57] ARM: VGIC: rename gic_inject() and gic_clear_lrs() Andre Przywara
2018-03-05 17:09 ` Julien Grall
2018-03-05 16:03 ` [PATCH 08/57] ARM: VGIC: Move gic_remove_from_lr_pending() prototype Andre Przywara
2018-03-05 16:03 ` [PATCH 09/57] ARM: VGIC: Move domain_max_vcpus() to be VGIC specific Andre Przywara
2018-03-05 17:14 ` Julien Grall
2018-03-05 16:03 ` [PATCH 10/57] ARM: VGIC: rename gic_event_needs_delivery() Andre Przywara
2018-03-06 11:46 ` Julien Grall
2018-03-05 16:03 ` [PATCH 11/57] ARM: VGIC: change to level-IRQ compatible IRQ injection interface Andre Przywara
2018-03-06 11:53 ` Julien Grall
2018-03-05 16:03 ` [PATCH 12/57] ARM: VGIC: carve out struct vgic_cpu and struct vgic_dist Andre Przywara
2018-03-06 11:56 ` Julien Grall
2018-03-05 16:03 ` [PATCH 13/57] ARM: VGIC: reorder prototypes in vgic.h Andre Przywara
2018-03-05 16:03 ` [PATCH 14/57] ARM: VGIC: Introduce gic_get_nr_lrs() Andre Przywara
2018-03-06 14:02 ` Julien Grall
2018-03-05 16:03 ` [PATCH 15/57] ARM: GICv2: Extend and adjust register definitions Andre Przywara
2018-03-06 14:12 ` Julien Grall
2018-03-05 16:03 ` [PATCH 16/57] ARM: GICv3: rename HYP interface definitions to use ICH_ prefix Andre Przywara
2018-03-06 15:12 ` Julien Grall
2018-03-05 16:03 ` [PATCH 17/57] ARM: Introduce kick_vcpu() Andre Przywara
2018-03-06 15:21 ` Julien Grall
2018-03-05 16:03 ` [PATCH 18/57] ARM: GICv2: introduce gicv2_poke_irq() Andre Przywara
2018-03-06 15:23 ` Julien Grall
2018-03-06 15:25 ` Julien Grall
2018-03-05 16:03 ` [PATCH 19/57] ARM: GICv3: poke_irq: make RWP optional Andre Przywara
2018-03-06 15:37 ` Julien Grall
2018-03-05 16:03 ` [PATCH 20/57] ARM: GICv2: fix GICH_V2_LR definitions Andre Przywara
2018-03-06 15:46 ` Julien Grall
2018-03-06 15:58 ` Andre Przywara
2018-03-06 16:18 ` Julien Grall
2018-03-05 16:03 ` [PATCH 21/57] ARM: GICv2: extend LR read/write functions to cover EOI and source Andre Przywara
2018-03-06 16:06 ` Julien Grall
2018-03-08 16:25 ` Andre Przywara
2018-03-08 16:41 ` Julien Grall
2018-03-08 16:59 ` Julien Grall
2018-03-05 16:03 ` [PATCH 22/57] ARM: GIC: Allow tweaking the active and pending state of an IRQ Andre Przywara
2018-03-06 16:38 ` Julien Grall
2018-03-05 16:03 ` [PATCH 23/57] ARM: GIC: allow reading pending state of a hardware IRQ Andre Przywara
2018-03-06 16:57 ` Julien Grall
2018-03-05 16:03 ` [PATCH 24/57] ARM: timer: Handle level triggered IRQs correctly Andre Przywara
2018-03-06 17:15 ` Julien Grall
2018-03-06 17:20 ` Julien Grall
2018-03-05 16:03 ` [PATCH 25/57] ARM: evtchn: " Andre Przywara
2018-03-05 16:03 ` [PATCH 26/57] ARM: vPL011: Use the VGIC's level triggered IRQs handling if available Andre Przywara
2018-03-06 17:23 ` Julien Grall
2018-03-05 16:03 ` [PATCH 27/57] ARM: new VGIC: Add data structure definitions Andre Przywara
2018-03-06 17:46 ` Julien Grall
2018-03-06 18:01 ` Andre Przywara
2018-03-07 10:45 ` Julien Grall
2018-03-05 16:03 ` [PATCH 28/57] ARM: new VGIC: Add acccessor to new struct vgic_irq instance Andre Przywara
2018-03-06 18:13 ` Julien Grall
2018-03-19 17:32 ` Andre Przywara
2018-03-19 21:53 ` Julien Grall
2018-03-20 10:58 ` Andre Przywara
2018-03-20 11:07 ` Julien Grall
2018-03-05 16:03 ` [PATCH 29/57] ARM: new VGIC: Implement virtual IRQ injection Andre Przywara
2018-03-07 11:02 ` Julien Grall
2018-03-07 11:22 ` Andre Przywara
2018-03-07 11:41 ` Julien Grall
2018-03-05 16:03 ` [PATCH 30/57] ARM: new VGIC: Add IRQ sorting Andre Przywara
2018-03-07 11:06 ` Julien Grall
2018-03-05 16:03 ` [PATCH 31/57] ARM: new VGIC: Add IRQ sync/flush framework Andre Przywara
2018-03-07 11:47 ` Julien Grall
2018-03-07 12:20 ` Andre Przywara
2018-03-05 16:03 ` [PATCH 32/57] ARM: new VGIC: Add GICv2 world switch backend Andre Przywara
2018-03-07 12:10 ` Julien Grall
2018-03-07 12:31 ` Andre Przywara
2018-03-05 16:03 ` [PATCH 33/57] ARM: new VGIC: Implement vgic_vcpu_pending_irq Andre Przywara
2018-03-05 16:03 ` [PATCH 34/57] ARM: new VGIC: Add MMIO handling framework Andre Przywara
2018-03-05 16:56 ` [FIXUP] replace LOG_2 with ilog2 Andre Przywara
2018-03-07 14:54 ` [PATCH 34/57] ARM: new VGIC: Add MMIO handling framework Julien Grall
2018-03-05 16:03 ` [PATCH 35/57] ARM: new VGIC: Add GICv2 " Andre Przywara
2018-03-07 15:00 ` Julien Grall
2018-03-05 16:03 ` [PATCH 36/57] ARM: new VGIC: Add CTLR, TYPER and IIDR handlers Andre Przywara
2018-03-07 16:48 ` Julien Grall
2018-03-05 16:03 ` [PATCH 37/57] ARM: new VGIC: Add ENABLE registers handlers Andre Przywara
2018-03-07 17:01 ` Julien Grall
2018-03-07 18:20 ` Andre Przywara
2018-03-07 18:33 ` Julien Grall
2018-03-05 16:03 ` [PATCH 38/57] ARM: new VGIC: Add PENDING " Andre Przywara
2018-03-07 17:21 ` Julien Grall
2018-03-05 16:03 ` [PATCH 39/57] ARM: new VGIC: Add ACTIVE " Andre Przywara
2018-03-08 15:39 ` Julien Grall
2018-03-13 17:02 ` Andre Przywara
2018-03-13 17:14 ` Julien Grall
2018-03-13 17:16 ` Julien Grall
2018-03-13 17:34 ` Andre Przywara
2018-03-13 17:42 ` Julien Grall
2018-03-14 14:30 ` Andre Przywara
2018-03-14 14:40 ` Julien Grall
2018-03-05 16:03 ` [PATCH 40/57] ARM: new VGIC: Add PRIORITY " Andre Przywara
2018-03-08 15:48 ` Julien Grall
2018-03-08 16:21 ` Andre Przywara
2018-03-08 16:25 ` Julien Grall
2018-03-05 16:03 ` [PATCH 41/57] ARM: new VGIC: Add CONFIG " Andre Przywara
2018-03-08 16:12 ` Julien Grall
2018-03-05 16:04 ` [PATCH 42/57] ARM: new VGIC: Add TARGET " Andre Przywara
2018-03-08 16:18 ` Julien Grall
2018-03-08 16:30 ` Andre Przywara
2018-03-05 16:04 ` [PATCH 43/57] ARM: new VGIC: Add SGIR register handler Andre Przywara
2018-03-08 16:30 ` Julien Grall
2018-03-05 16:04 ` [PATCH 44/57] ARM: new VGIC: Add SGIPENDR register handlers Andre Przywara
2018-03-08 16:36 ` Julien Grall
2018-03-05 16:04 ` [PATCH 45/57] ARM: new VGIC: Handle hardware mapped IRQs Andre Przywara
2018-03-09 17:27 ` Julien Grall [this message]
2018-03-05 16:04 ` [PATCH 46/57] ARM: new VGIC: Add event channel IRQ handling Andre Przywara
2018-03-09 17:40 ` Julien Grall
2018-03-05 16:04 ` [PATCH 47/57] ARM: new VGIC: Handle virtual IRQ allocation/reservation Andre Przywara
2018-03-09 17:52 ` Julien Grall
2018-03-05 16:04 ` [PATCH 48/57] ARM: new VGIC: Dump virtual IRQ info Andre Przywara
2018-03-09 17:53 ` Julien Grall
2018-03-05 16:04 ` [PATCH 49/57] ARM: new VGIC: provide system register emulation stub Andre Przywara
2018-03-09 17:53 ` Julien Grall
2018-03-05 16:04 ` [PATCH 50/57] ARM: new VGIC: Implement arch_move_irqs() Andre Przywara
2018-03-09 17:55 ` Julien Grall
2018-03-05 16:04 ` [PATCH 51/57] ARM: new VGIC: Add preliminary stub implementation Andre Przywara
2018-03-09 18:18 ` Julien Grall
2018-03-13 15:55 ` Andre Przywara
2018-03-14 13:29 ` Julien Grall
2018-03-05 16:04 ` [PATCH 52/57] ARM: new VGIC: vgic-init: register VGIC Andre Przywara
2018-03-05 16:04 ` [PATCH 53/57] ARM: new VGIC: vgic-init: implement vgic_init Andre Przywara
2018-03-09 18:24 ` Julien Grall
2018-03-05 16:04 ` [PATCH 54/57] ARM: new VGIC: vgic-init: implement map_resources Andre Przywara
2018-03-09 18:27 ` Julien Grall
2018-03-05 16:04 ` [PATCH 55/57] ARM: new VGIC: Add vgic_v2_enable Andre Przywara
2018-03-09 18:29 ` Julien Grall
2018-03-05 16:04 ` [PATCH 56/57] ARM: allocate two pages for struct vcpu Andre Przywara
2018-03-09 18:30 ` Julien Grall
2018-03-05 16:04 ` [PATCH 57/57] ARM: VGIC: wire new VGIC(-v2) files into Xen build system Andre Przywara
2018-03-09 18:34 ` Julien Grall
2018-03-05 17:34 ` [PATCH 00/57] New VGIC(-v2) implementation Andre Przywara
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