From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andres Lagar-Cavilla Subject: [PATCH 2 of 3] Clip mfn to allowable width when building a PTE Date: Wed, 21 Mar 2012 15:22:59 -0400 Message-ID: References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xen.org Cc: olaf@aepfle.de, keir@xen.org, andres@gridcentric.ca, tim@xen.org, wei.wang2@amd.com, hongkaixing@huawei.com, adin@gridcentric.ca List-Id: xen-devel@lists.xenproject.org xen/include/asm-x86/page.h | 12 ++++++++---- 1 files changed, 8 insertions(+), 4 deletions(-) Otherwise, INVALID_MFN tramples over high order bits used for additional flags. Signed-off-by: Andres Lagar-Cavilla Signed-off-by: Tim Deegan diff -r 642c0e6a01c2 -r e325da663345 xen/include/asm-x86/page.h --- a/xen/include/asm-x86/page.h +++ b/xen/include/asm-x86/page.h @@ -107,13 +107,17 @@ /* Construct a pte from a pfn and access flags. */ #define l1e_from_pfn(pfn, flags) \ - ((l1_pgentry_t) { ((intpte_t)(pfn) << PAGE_SHIFT) | put_pte_flags(flags) }) + ((l1_pgentry_t) { (((intpte_t)(pfn) << PAGE_SHIFT) & PADDR_MASK) \ + | put_pte_flags(flags) }) #define l2e_from_pfn(pfn, flags) \ - ((l2_pgentry_t) { ((intpte_t)(pfn) << PAGE_SHIFT) | put_pte_flags(flags) }) + ((l2_pgentry_t) { (((intpte_t)(pfn) << PAGE_SHIFT) & PADDR_MASK) \ + | put_pte_flags(flags) }) #define l3e_from_pfn(pfn, flags) \ - ((l3_pgentry_t) { ((intpte_t)(pfn) << PAGE_SHIFT) | put_pte_flags(flags) }) + ((l3_pgentry_t) { (((intpte_t)(pfn) << PAGE_SHIFT) & PADDR_MASK) \ + | put_pte_flags(flags) }) #define l4e_from_pfn(pfn, flags) \ - ((l4_pgentry_t) { ((intpte_t)(pfn) << PAGE_SHIFT) | put_pte_flags(flags) }) + ((l4_pgentry_t) { (((intpte_t)(pfn) << PAGE_SHIFT) & PADDR_MASK) \ + | put_pte_flags(flags) }) /* Construct a pte from a physical address and access flags. */ #ifndef __ASSEMBLY__