From: George Dunlap <george.dunlap@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>,
Xen-devel <xen-devel@lists.xen.org>
Cc: George Dunlap <george.dunlap@eu.citrix.com>,
Paul Durrant <paul.durrant@citrix.com>, Tim Deegan <tim@xen.org>,
Jan Beulich <JBeulich@suse.com>
Subject: Re: [PATCH 1/7] x86/hvm: Correctly identify implicit supervisor accesses
Date: Tue, 7 Mar 2017 10:46:40 +0000 [thread overview]
Message-ID: <e3b11589-c3d0-7b3c-fd9c-39b79be46345@citrix.com> (raw)
In-Reply-To: <1488204198-23948-2-git-send-email-andrew.cooper3@citrix.com>
On 27/02/17 14:03, Andrew Cooper wrote:
> All actions which refer to the active ldt/gdt/idt or task register
> (e.g. loading a new segment selector) are known as implicit supervisor
> accesses, even when the access originates from user code.
>
> The distinction is necessary in the pagewalk when SMAP is enabled. Refer to
> Intel SDM Vol 3 "Access Rights" for the exact details.
>
> Introduce a new pagewalk input, and make use of the new system segment
> references in hvmemul_{read,write}(). While modifying those areas, move the
> calculation of the appropriate pagewalk input before its first use.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: George Dunlap <george.dunlap@citrix.com>
> ---
> CC: Jan Beulich <JBeulich@suse.com>
> CC: Paul Durrant <paul.durrant@citrix.com>
> CC: George Dunlap <george.dunlap@eu.citrix.com>
> CC: Tim Deegan <tim@xen.org>
> ---
> xen/arch/x86/hvm/emulate.c | 18 ++++++++++--------
> xen/arch/x86/mm/guest_walk.c | 4 ++++
> xen/include/asm-x86/processor.h | 1 +
> 3 files changed, 15 insertions(+), 8 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
> index f24d289..9b32bca 100644
> --- a/xen/arch/x86/hvm/emulate.c
> +++ b/xen/arch/x86/hvm/emulate.c
> @@ -783,6 +783,11 @@ static int __hvmemul_read(
> struct hvm_vcpu_io *vio = &curr->arch.hvm_vcpu.hvm_io;
> int rc;
>
> + if ( is_x86_system_segment(seg) )
> + pfec |= PFEC_implicit;
> + else if ( hvmemul_ctxt->seg_reg[x86_seg_ss].attr.fields.dpl == 3 )
> + pfec |= PFEC_user_mode;
> +
> rc = hvmemul_virtual_to_linear(
> seg, offset, bytes, &reps, access_type, hvmemul_ctxt, &addr);
> if ( rc != X86EMUL_OKAY || !bytes )
> @@ -793,10 +798,6 @@ static int __hvmemul_read(
> (vio->mmio_gla == (addr & PAGE_MASK)) )
> return hvmemul_linear_mmio_read(addr, bytes, p_data, pfec, hvmemul_ctxt, 1);
>
> - if ( (seg != x86_seg_none) &&
> - (hvmemul_ctxt->seg_reg[x86_seg_ss].attr.fields.dpl == 3) )
> - pfec |= PFEC_user_mode;
> -
> rc = ((access_type == hvm_access_insn_fetch) ?
> hvm_fetch_from_guest_linear(p_data, addr, bytes, pfec, &pfinfo) :
> hvm_copy_from_guest_linear(p_data, addr, bytes, pfec, &pfinfo));
> @@ -893,6 +894,11 @@ static int hvmemul_write(
> struct hvm_vcpu_io *vio = &curr->arch.hvm_vcpu.hvm_io;
> int rc;
>
> + if ( is_x86_system_segment(seg) )
> + pfec |= PFEC_implicit;
> + else if ( hvmemul_ctxt->seg_reg[x86_seg_ss].attr.fields.dpl == 3 )
> + pfec |= PFEC_user_mode;
> +
> rc = hvmemul_virtual_to_linear(
> seg, offset, bytes, &reps, hvm_access_write, hvmemul_ctxt, &addr);
> if ( rc != X86EMUL_OKAY || !bytes )
> @@ -902,10 +908,6 @@ static int hvmemul_write(
> (vio->mmio_gla == (addr & PAGE_MASK)) )
> return hvmemul_linear_mmio_write(addr, bytes, p_data, pfec, hvmemul_ctxt, 1);
>
> - if ( (seg != x86_seg_none) &&
> - (hvmemul_ctxt->seg_reg[x86_seg_ss].attr.fields.dpl == 3) )
> - pfec |= PFEC_user_mode;
> -
> rc = hvm_copy_to_guest_linear(addr, p_data, bytes, pfec, &pfinfo);
>
> switch ( rc )
> diff --git a/xen/arch/x86/mm/guest_walk.c b/xen/arch/x86/mm/guest_walk.c
> index faaf70c..4f8d0e3 100644
> --- a/xen/arch/x86/mm/guest_walk.c
> +++ b/xen/arch/x86/mm/guest_walk.c
> @@ -161,6 +161,10 @@ guest_walk_tables(struct vcpu *v, struct p2m_domain *p2m,
> bool_t pse1G = 0, pse2M = 0;
> p2m_query_t qt = P2M_ALLOC | P2M_UNSHARE;
>
> + /* Only implicit supervisor data accesses exist. */
> + ASSERT(!(pfec & PFEC_implicit) ||
> + !(pfec & (PFEC_insn_fetch|PFEC_user_mode)));
> +
> perfc_incr(guest_walk);
> memset(gw, 0, sizeof(*gw));
> gw->va = va;
> diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
> index dda8b83..d3ba8ea 100644
> --- a/xen/include/asm-x86/processor.h
> +++ b/xen/include/asm-x86/processor.h
> @@ -76,6 +76,7 @@
> /* Internally used only flags. */
> #define PFEC_page_paged (1U<<16)
> #define PFEC_page_shared (1U<<17)
> +#define PFEC_implicit (1U<<18) /* Pagewalk input for ldt/gdt/idt/tr accesses. */
>
> /* Other exception error code values. */
> #define X86_XEC_EXT (_AC(1,U) << 0)
>
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next prev parent reply other threads:[~2017-03-07 10:46 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-27 14:03 [PATCH 0/7] Fixes to pagetable handling Andrew Cooper
2017-02-27 14:03 ` [PATCH 1/7] x86/hvm: Correctly identify implicit supervisor accesses Andrew Cooper
2017-03-01 15:05 ` Jan Beulich
2017-03-02 16:14 ` Tim Deegan
2017-03-07 10:46 ` George Dunlap [this message]
2017-03-07 10:51 ` Andrew Cooper
2017-03-07 15:00 ` Paul Durrant
2017-02-27 14:03 ` [PATCH 2/7] x86/shadow: Try to correctly " Andrew Cooper
2017-03-01 15:11 ` Jan Beulich
2017-03-02 16:14 ` Tim Deegan
2017-03-07 11:26 ` George Dunlap
2017-03-07 11:55 ` Andrew Cooper
2017-02-27 14:03 ` [PATCH 3/7] x86/pagewalk: Helpers for reserved bit handling Andrew Cooper
2017-03-01 15:57 ` Jan Beulich
2017-03-02 12:23 ` Andrew Cooper
2017-03-02 14:12 ` Tim Deegan
2017-03-02 14:17 ` Andrew Cooper
2017-03-02 15:09 ` Tim Deegan
2017-03-02 15:14 ` Andrew Cooper
2017-03-02 16:15 ` Tim Deegan
2017-02-27 14:03 ` [PATCH 4/7] x86/hvm: Adjust hvm_nx_enabled() to match how Xen behaves Andrew Cooper
2017-03-01 16:00 ` Jan Beulich
2017-02-27 14:03 ` [PATCH 5/7] x86/shadow: Use the pagewalk reserved bits helpers Andrew Cooper
2017-03-01 16:03 ` Jan Beulich
2017-03-02 12:26 ` Andrew Cooper
2017-03-02 12:51 ` Jan Beulich
2017-03-02 12:56 ` Andrew Cooper
2017-03-02 13:19 ` Jan Beulich
2017-03-02 14:32 ` Andrew Cooper
2017-03-06 9:26 ` Tim Deegan
2017-03-02 14:33 ` Tim Deegan
2017-02-27 14:03 ` [PATCH 6/7] x86/pagewalk: Consistently use guest_walk_*() helpers for translation Andrew Cooper
2017-03-01 16:22 ` Jan Beulich
2017-03-01 16:33 ` Andrew Cooper
2017-03-01 16:41 ` Jan Beulich
2017-03-02 16:15 ` Tim Deegan
2017-03-06 18:25 ` George Dunlap
2017-02-27 14:03 ` [PATCH 7/7] x86/pagewalk: Re-implement the pagetable walker Andrew Cooper
2017-03-02 11:52 ` Jan Beulich
2017-03-02 12:00 ` Andrew Cooper
2017-03-02 12:54 ` Jan Beulich
2017-03-02 16:16 ` Tim Deegan
2017-03-06 18:28 ` George Dunlap
2017-03-06 18:33 ` Andrew Cooper
2017-03-06 18:39 ` George Dunlap
2017-03-07 12:57 ` George Dunlap
2017-03-01 16:24 ` [PATCH 0/7] Fixes to pagetable handling Jan Beulich
2017-03-01 16:32 ` Andrew Cooper
2017-03-06 16:42 ` [RFC XTF PATCH] Pagetable Emulation testing Andrew Cooper
2017-03-13 15:45 ` Jan Beulich
2017-03-13 17:48 ` Andrew Cooper
2017-03-14 11:17 ` Jan Beulich
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