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From: Julien Grall <julien.grall@arm.com>
To: Andre Przywara <andre.przywara@linaro.org>,
	Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org
Subject: Re: [PATCH 28/57] ARM: new VGIC: Add acccessor to new struct vgic_irq instance
Date: Mon, 19 Mar 2018 21:53:41 +0000	[thread overview]
Message-ID: <f18d38c1-44ab-9d8b-1c9c-3481b922b698@arm.com> (raw)
In-Reply-To: <f0f3b85e-2eea-6632-e2c6-824ab099837b@linaro.org>



On 03/19/2018 05:32 PM, Andre Przywara wrote:
> Hi,

Hi,

> On 06/03/18 18:13, Julien Grall wrote:
>> Hi Andre,
>>
>> On 05/03/18 16:03, Andre Przywara wrote:
>>> The new VGIC implementation centers around a struct vgic_irq instance
>>> per virtual IRQ.
>>> Provide a function to retrieve the right instance for a given IRQ
>>> number and (in case of private interrupts) the right VCPU.
>>> This also includes the corresponding put function, which does nothing
>>> for private interrupts and SPIs, but handles the ref-counting for LPIs.
>>>
>>> This is based on Linux commit 64a959d66e47, written by Christoffer Dall.
>>>
>>> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
>>> ---
>>> Changelog RFC ... v1:
>>> - add kernel-doc comments to exported functions
>>> - adapt to previous changes (new_vgic.h, arch_vcpu member name)
>>> - use ASSERT_UNREACHABLE
>>>
>>>    xen/arch/arm/vgic/vgic.c | 124
>>> +++++++++++++++++++++++++++++++++++++++++++++++
>>>    xen/arch/arm/vgic/vgic.h |  41 ++++++++++++++++
>>>    2 files changed, 165 insertions(+)
>>>    create mode 100644 xen/arch/arm/vgic/vgic.c
>>>    create mode 100644 xen/arch/arm/vgic/vgic.h
>>>
>>> diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c
>>> new file mode 100644
>>> index 0000000000..ace30f78d0
>>> --- /dev/null
>>> +++ b/xen/arch/arm/vgic/vgic.c
>>> @@ -0,0 +1,124 @@
>>> +/*
>>> + * Copyright (C) 2015, 2016 ARM Ltd.
>>> + * Imported from Linux ("new" KVM VGIC) and heavily adapted to Xen.
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>> + * GNU General Public License for more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License
>>> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
>>> + */
>>> +
>>> +#include <asm/bug.h>
>>> +#include <asm/new_vgic.h>
>>> +#include <xen/sched.h>
>>> +
>>> +#include "vgic.h"
>>> +
>>> +/*
>>> + * Iterate over the VM's list of mapped LPIs to find the one with a
>>> + * matching interrupt ID and return a reference to the IRQ structure.
>>> + */
>>> +static struct vgic_irq *vgic_get_lpi(struct domain *d, u32 intid)
>>> +{
>>> +    struct vgic_dist *dist = &d->arch.vgic;
>>> +    struct vgic_irq *irq = NULL;
>>> +
>>> +    spin_lock(&dist->lpi_list_lock);
>>> +
>>> +    list_for_each_entry( irq, &dist->lpi_list_head, lpi_list )
>>
>> I am still not a big fan of the list solution. Strictly speaking nobody
>> is populating that list and likely going to be too slow in Xen case (I
>> am thinking for the hardware domain). So I think I would prefer to see
>> the LPI related code disappear for this cut. This could easily be added
>> back as they are standalone.
> 
> I was thinking about that, but dismissed the idea:
> Considering LPIs as first class citizens is a crucial property of the
> new VGIC and actually the main driver for its creation: the refcounting
> is solely in for that purpose, and the per-IRQ data structure and its
> lock are mainly driven by it. So removing the LPI support completely
> will make the refcounting look very awkward (since useless and unused).
> Consequently one would need to remove that as well. In the worst case we
> run into issues with unused functions, like vgic_get_irq_kref().
> 
> I already removed a lot of code from the KVM VGIC, which I feel we will
> need back one day. So I really like to keep this one in, and be it just
> for documentation how the refcounting is supposed to be used.
> I will add a comment to this respect.
> And I believe replacing the list_for_each_entry() with something more
> sophisticated is the least of our problems later on.

Using a list for LPIs means the search is O(n). That search will be done 
each time you want to get the LPI information.

While in guest you may have limited LPIs, this will not be the case for 
the hardware domain. Indeed that domain has access to all devices and 
likely going to use a lot of MSIs.

So I still can't understand why you dismiss that problem.

To be honest, I don't mind to keep the refcounting around. What I don't 
want to see in Xen is using a data structure that we know will not fit 
Xen (even for well-behave guests).

You may remove a lot of code, and re-add the code later but that's the 
price to convert KVM to Xen code. It makes much more sense to get all 
the LPIs infrastructure together.

And to be clear, what I am asking for is implementing vgic_get_lpi with 
return NULL + a comment.

Cheers,

-- 
Julien Grall

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  reply	other threads:[~2018-03-19 21:53 UTC|newest]

Thread overview: 146+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-05 16:03 [PATCH 00/57] New VGIC(-v2) implementation Andre Przywara
2018-03-05 16:03 ` [PATCH 01/57] tools: ARM: vGICv3: Avoid inserting optional DT properties Andre Przywara
2018-03-05 16:39   ` Julien Grall
2018-03-05 17:18     ` Wei Liu
2018-03-06 11:16       ` Julien Grall
2018-03-05 16:03 ` [PATCH 02/57] ARM: vGICv3: clarify on GUEST_GICV3_RDIST_REGIONS symbol Andre Przywara
2018-03-05 16:40   ` Julien Grall
2018-03-05 16:03 ` [PATCH 03/57] ARM: GICv3: use hardware GICv3 redistributor values for Dom0 Andre Przywara
2018-03-05 16:44   ` Julien Grall
2018-03-05 16:03 ` [PATCH 04/57] ARM: GICv3: simplify GICv3 redistributor stride handling Andre Przywara
2018-03-05 17:08   ` Julien Grall
2018-03-06 13:49     ` Julien Grall
2018-03-08 12:40       ` Andre Przywara
2018-03-08 15:29         ` Julien Grall
2018-03-05 16:03 ` [PATCH 05/57] ARM: vGICv3: always use architected redist stride Andre Przywara
2018-03-05 16:03 ` [PATCH 06/57] ARM: vGICv3: remove rdist_stride from VGIC structure Andre Przywara
2018-03-05 16:03 ` [PATCH 07/57] ARM: VGIC: rename gic_inject() and gic_clear_lrs() Andre Przywara
2018-03-05 17:09   ` Julien Grall
2018-03-05 16:03 ` [PATCH 08/57] ARM: VGIC: Move gic_remove_from_lr_pending() prototype Andre Przywara
2018-03-05 16:03 ` [PATCH 09/57] ARM: VGIC: Move domain_max_vcpus() to be VGIC specific Andre Przywara
2018-03-05 17:14   ` Julien Grall
2018-03-05 16:03 ` [PATCH 10/57] ARM: VGIC: rename gic_event_needs_delivery() Andre Przywara
2018-03-06 11:46   ` Julien Grall
2018-03-05 16:03 ` [PATCH 11/57] ARM: VGIC: change to level-IRQ compatible IRQ injection interface Andre Przywara
2018-03-06 11:53   ` Julien Grall
2018-03-05 16:03 ` [PATCH 12/57] ARM: VGIC: carve out struct vgic_cpu and struct vgic_dist Andre Przywara
2018-03-06 11:56   ` Julien Grall
2018-03-05 16:03 ` [PATCH 13/57] ARM: VGIC: reorder prototypes in vgic.h Andre Przywara
2018-03-05 16:03 ` [PATCH 14/57] ARM: VGIC: Introduce gic_get_nr_lrs() Andre Przywara
2018-03-06 14:02   ` Julien Grall
2018-03-05 16:03 ` [PATCH 15/57] ARM: GICv2: Extend and adjust register definitions Andre Przywara
2018-03-06 14:12   ` Julien Grall
2018-03-05 16:03 ` [PATCH 16/57] ARM: GICv3: rename HYP interface definitions to use ICH_ prefix Andre Przywara
2018-03-06 15:12   ` Julien Grall
2018-03-05 16:03 ` [PATCH 17/57] ARM: Introduce kick_vcpu() Andre Przywara
2018-03-06 15:21   ` Julien Grall
2018-03-05 16:03 ` [PATCH 18/57] ARM: GICv2: introduce gicv2_poke_irq() Andre Przywara
2018-03-06 15:23   ` Julien Grall
2018-03-06 15:25     ` Julien Grall
2018-03-05 16:03 ` [PATCH 19/57] ARM: GICv3: poke_irq: make RWP optional Andre Przywara
2018-03-06 15:37   ` Julien Grall
2018-03-05 16:03 ` [PATCH 20/57] ARM: GICv2: fix GICH_V2_LR definitions Andre Przywara
2018-03-06 15:46   ` Julien Grall
2018-03-06 15:58     ` Andre Przywara
2018-03-06 16:18       ` Julien Grall
2018-03-05 16:03 ` [PATCH 21/57] ARM: GICv2: extend LR read/write functions to cover EOI and source Andre Przywara
2018-03-06 16:06   ` Julien Grall
2018-03-08 16:25     ` Andre Przywara
2018-03-08 16:41       ` Julien Grall
2018-03-08 16:59         ` Julien Grall
2018-03-05 16:03 ` [PATCH 22/57] ARM: GIC: Allow tweaking the active and pending state of an IRQ Andre Przywara
2018-03-06 16:38   ` Julien Grall
2018-03-05 16:03 ` [PATCH 23/57] ARM: GIC: allow reading pending state of a hardware IRQ Andre Przywara
2018-03-06 16:57   ` Julien Grall
2018-03-05 16:03 ` [PATCH 24/57] ARM: timer: Handle level triggered IRQs correctly Andre Przywara
2018-03-06 17:15   ` Julien Grall
2018-03-06 17:20     ` Julien Grall
2018-03-05 16:03 ` [PATCH 25/57] ARM: evtchn: " Andre Przywara
2018-03-05 16:03 ` [PATCH 26/57] ARM: vPL011: Use the VGIC's level triggered IRQs handling if available Andre Przywara
2018-03-06 17:23   ` Julien Grall
2018-03-05 16:03 ` [PATCH 27/57] ARM: new VGIC: Add data structure definitions Andre Przywara
2018-03-06 17:46   ` Julien Grall
2018-03-06 18:01     ` Andre Przywara
2018-03-07 10:45       ` Julien Grall
2018-03-05 16:03 ` [PATCH 28/57] ARM: new VGIC: Add acccessor to new struct vgic_irq instance Andre Przywara
2018-03-06 18:13   ` Julien Grall
2018-03-19 17:32     ` Andre Przywara
2018-03-19 21:53       ` Julien Grall [this message]
2018-03-20 10:58         ` Andre Przywara
2018-03-20 11:07           ` Julien Grall
2018-03-05 16:03 ` [PATCH 29/57] ARM: new VGIC: Implement virtual IRQ injection Andre Przywara
2018-03-07 11:02   ` Julien Grall
2018-03-07 11:22     ` Andre Przywara
2018-03-07 11:41       ` Julien Grall
2018-03-05 16:03 ` [PATCH 30/57] ARM: new VGIC: Add IRQ sorting Andre Przywara
2018-03-07 11:06   ` Julien Grall
2018-03-05 16:03 ` [PATCH 31/57] ARM: new VGIC: Add IRQ sync/flush framework Andre Przywara
2018-03-07 11:47   ` Julien Grall
2018-03-07 12:20     ` Andre Przywara
2018-03-05 16:03 ` [PATCH 32/57] ARM: new VGIC: Add GICv2 world switch backend Andre Przywara
2018-03-07 12:10   ` Julien Grall
2018-03-07 12:31     ` Andre Przywara
2018-03-05 16:03 ` [PATCH 33/57] ARM: new VGIC: Implement vgic_vcpu_pending_irq Andre Przywara
2018-03-05 16:03 ` [PATCH 34/57] ARM: new VGIC: Add MMIO handling framework Andre Przywara
2018-03-05 16:56   ` [FIXUP] replace LOG_2 with ilog2 Andre Przywara
2018-03-07 14:54   ` [PATCH 34/57] ARM: new VGIC: Add MMIO handling framework Julien Grall
2018-03-05 16:03 ` [PATCH 35/57] ARM: new VGIC: Add GICv2 " Andre Przywara
2018-03-07 15:00   ` Julien Grall
2018-03-05 16:03 ` [PATCH 36/57] ARM: new VGIC: Add CTLR, TYPER and IIDR handlers Andre Przywara
2018-03-07 16:48   ` Julien Grall
2018-03-05 16:03 ` [PATCH 37/57] ARM: new VGIC: Add ENABLE registers handlers Andre Przywara
2018-03-07 17:01   ` Julien Grall
2018-03-07 18:20     ` Andre Przywara
2018-03-07 18:33       ` Julien Grall
2018-03-05 16:03 ` [PATCH 38/57] ARM: new VGIC: Add PENDING " Andre Przywara
2018-03-07 17:21   ` Julien Grall
2018-03-05 16:03 ` [PATCH 39/57] ARM: new VGIC: Add ACTIVE " Andre Przywara
2018-03-08 15:39   ` Julien Grall
2018-03-13 17:02     ` Andre Przywara
2018-03-13 17:14       ` Julien Grall
2018-03-13 17:16         ` Julien Grall
2018-03-13 17:34         ` Andre Przywara
2018-03-13 17:42           ` Julien Grall
2018-03-14 14:30             ` Andre Przywara
2018-03-14 14:40               ` Julien Grall
2018-03-05 16:03 ` [PATCH 40/57] ARM: new VGIC: Add PRIORITY " Andre Przywara
2018-03-08 15:48   ` Julien Grall
2018-03-08 16:21     ` Andre Przywara
2018-03-08 16:25       ` Julien Grall
2018-03-05 16:03 ` [PATCH 41/57] ARM: new VGIC: Add CONFIG " Andre Przywara
2018-03-08 16:12   ` Julien Grall
2018-03-05 16:04 ` [PATCH 42/57] ARM: new VGIC: Add TARGET " Andre Przywara
2018-03-08 16:18   ` Julien Grall
2018-03-08 16:30     ` Andre Przywara
2018-03-05 16:04 ` [PATCH 43/57] ARM: new VGIC: Add SGIR register handler Andre Przywara
2018-03-08 16:30   ` Julien Grall
2018-03-05 16:04 ` [PATCH 44/57] ARM: new VGIC: Add SGIPENDR register handlers Andre Przywara
2018-03-08 16:36   ` Julien Grall
2018-03-05 16:04 ` [PATCH 45/57] ARM: new VGIC: Handle hardware mapped IRQs Andre Przywara
2018-03-09 17:27   ` Julien Grall
2018-03-05 16:04 ` [PATCH 46/57] ARM: new VGIC: Add event channel IRQ handling Andre Przywara
2018-03-09 17:40   ` Julien Grall
2018-03-05 16:04 ` [PATCH 47/57] ARM: new VGIC: Handle virtual IRQ allocation/reservation Andre Przywara
2018-03-09 17:52   ` Julien Grall
2018-03-05 16:04 ` [PATCH 48/57] ARM: new VGIC: Dump virtual IRQ info Andre Przywara
2018-03-09 17:53   ` Julien Grall
2018-03-05 16:04 ` [PATCH 49/57] ARM: new VGIC: provide system register emulation stub Andre Przywara
2018-03-09 17:53   ` Julien Grall
2018-03-05 16:04 ` [PATCH 50/57] ARM: new VGIC: Implement arch_move_irqs() Andre Przywara
2018-03-09 17:55   ` Julien Grall
2018-03-05 16:04 ` [PATCH 51/57] ARM: new VGIC: Add preliminary stub implementation Andre Przywara
2018-03-09 18:18   ` Julien Grall
2018-03-13 15:55     ` Andre Przywara
2018-03-14 13:29       ` Julien Grall
2018-03-05 16:04 ` [PATCH 52/57] ARM: new VGIC: vgic-init: register VGIC Andre Przywara
2018-03-05 16:04 ` [PATCH 53/57] ARM: new VGIC: vgic-init: implement vgic_init Andre Przywara
2018-03-09 18:24   ` Julien Grall
2018-03-05 16:04 ` [PATCH 54/57] ARM: new VGIC: vgic-init: implement map_resources Andre Przywara
2018-03-09 18:27   ` Julien Grall
2018-03-05 16:04 ` [PATCH 55/57] ARM: new VGIC: Add vgic_v2_enable Andre Przywara
2018-03-09 18:29   ` Julien Grall
2018-03-05 16:04 ` [PATCH 56/57] ARM: allocate two pages for struct vcpu Andre Przywara
2018-03-09 18:30   ` Julien Grall
2018-03-05 16:04 ` [PATCH 57/57] ARM: VGIC: wire new VGIC(-v2) files into Xen build system Andre Przywara
2018-03-09 18:34   ` Julien Grall
2018-03-05 17:34 ` [PATCH 00/57] New VGIC(-v2) implementation Andre Przywara

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