From: Andre Przywara <andre.przywara@linaro.org>
To: Julien Grall <julien.grall@arm.com>, xen-devel@lists.xen.org
Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com
Subject: Re: [PATCH v3 17/17] xen/arm: vpsci: Rework the logic to start AArch32 vCPU in Thumb mode
Date: Wed, 21 Feb 2018 16:01:05 +0000 [thread overview]
Message-ID: <f6f4bdfb-5deb-03f7-3da2-3046bb331e68@linaro.org> (raw)
In-Reply-To: <20180215150248.28922-18-julien.grall@arm.com>
Hi,
On 15/02/18 15:02, Julien Grall wrote:
> 32-bit domain is able to select the instruction (ARM vs Thumb) to use
> when boot a new vCPU via CPU_ON. This is indicated via bit[0] of the
> entry point address (see "T32 support" in PSCI v1.1 DEN0022D). bit[0]
> must be cleared when setting the PC.
>
> At the moment, Xen is setting the CPSR.T but never clear bit[0]. Clear
> it to match the specification.
Yes, that is the right thing to do, as the spec requires this.
> At the same time, slighlty rework the code to make clear thumb is only for
> 32-bit domain. Lastly, take the opportunity to switch is_thumb from int
> to bool.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre.
>
> ---
> Changes in v3:
> - Patch added
> ---
> xen/arch/arm/vpsci.c | 13 ++++++++-----
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
> index 1729f7071e..9f4e5b8844 100644
> --- a/xen/arch/arm/vpsci.c
> +++ b/xen/arch/arm/vpsci.c
> @@ -28,7 +28,7 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
> struct domain *d = current->domain;
> struct vcpu_guest_context *ctxt;
> int rc;
> - int is_thumb = entry_point & 1;
> + bool is_thumb = entry_point & 1;
> register_t vcpuid;
>
> vcpuid = vaffinity_to_vcpuid(target_cpu);
> @@ -62,6 +62,13 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
> if ( is_32bit_domain(d) )
> {
> ctxt->user_regs.cpsr = PSR_GUEST32_INIT;
> + /* Start the VCPU with THUMB set if it's requested by the kernel */
> + if ( is_thumb )
> + {
> + ctxt->user_regs.cpsr |= PSR_THUMB;
> + ctxt->user_regs.pc64 &= ~(u64)1;
> + }
> +
> ctxt->user_regs.r0_usr = context_id;
> }
> #ifdef CONFIG_ARM_64
> @@ -71,10 +78,6 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
> ctxt->user_regs.x0 = context_id;
> }
> #endif
> -
> - /* Start the VCPU with THUMB set if it's requested by the kernel */
> - if ( is_thumb )
> - ctxt->user_regs.cpsr |= PSR_THUMB;
> ctxt->flags = VGCF_online;
>
> domain_lock(d);
>
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
prev parent reply other threads:[~2018-02-21 16:01 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-15 15:02 [PATCH v3 00/17] xen/arm: PSCI 1.1 and SMCCC-1.1 support and XSA-254 variant 2 update Julien Grall
2018-02-15 15:02 ` [PATCH v3 01/17] xen/arm: vpsci: Add support for PSCI 1.1 Julien Grall
2018-02-20 0:14 ` Stefano Stabellini
2018-02-21 0:37 ` Stefano Stabellini
2018-02-21 8:05 ` Julien Grall
2018-02-15 15:02 ` [PATCH v3 02/17] xen/arm: vsmc: Implement SMCCC 1.1 Julien Grall
2018-02-15 15:11 ` Volodymyr Babchuk
2018-02-20 0:22 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 03/17] xen/arm: vsmc: Implement SMCCC_ARCH_WORKAROUND_1 BP hardening support Julien Grall
2018-02-20 0:30 ` Stefano Stabellini
2018-02-21 16:34 ` Andre Przywara
2018-02-21 16:41 ` Julien Grall
2018-02-21 16:50 ` Andre Przywara
2018-02-15 15:02 ` [PATCH v3 04/17] xen/arm: Adapt smccc.h to be able to use it in assembly code Julien Grall
2018-02-20 0:30 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 05/17] xen/arm64: Implement a fast path for handling SMCCC_ARCH_WORKAROUND_1 Julien Grall
2018-02-21 0:37 ` Stefano Stabellini
2018-02-21 14:27 ` Andre Przywara
2018-02-22 13:58 ` Julien Grall
2018-02-15 15:02 ` [PATCH v3 06/17] xen/arm64: Print a per-CPU message with the BP hardening method used Julien Grall
2018-02-20 0:35 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 07/17] xen/arm: smccc: Add macros SMCCC_VERSION, SMCCC_VERSION_{MINOR, MAJOR} Julien Grall
2018-02-20 0:36 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 08/17] xen/arm: psci: Detect SMCCC version Julien Grall
2018-02-21 0:16 ` Stefano Stabellini
2018-02-21 14:43 ` Andre Przywara
2018-02-15 15:02 ` [PATCH v3 09/17] xen/arm: smccc: Implement SMCCC v1.1 inline primitive Julien Grall
2018-02-21 0:21 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 10/17] xen/arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support Julien Grall
2018-02-15 15:13 ` Volodymyr Babchuk
2018-02-21 0:35 ` Stefano Stabellini
2018-02-21 8:17 ` Julien Grall
2018-02-21 17:35 ` Stefano Stabellini
2018-02-22 16:03 ` Julien Grall
2018-02-21 16:07 ` Andre Przywara
2018-02-22 15:59 ` Julien Grall
2018-02-15 15:02 ` [PATCH v3 11/17] xen/arm64: Kill PSCI_GET_VERSION as a variant-2 workaround Julien Grall
2018-02-21 0:44 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 12/17] xen/arm: vpsci: Remove parameter 'ver' from do_common_cpu Julien Grall
2018-02-21 0:48 ` Stefano Stabellini
2018-02-21 16:27 ` Andre Przywara
2018-02-21 16:37 ` Julien Grall
2018-02-22 16:12 ` Julien Grall
2018-02-15 15:02 ` [PATCH v3 13/17] xen/arm: psci: Consolidate PSCI version print Julien Grall
2018-02-21 0:49 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 14/17] xen/arm: psci: Prefix with static any functions not exported Julien Grall
2018-02-21 0:50 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 15/17] xen/arm: vpsci: Update the return type for MIGRATE_INFO_TYPE Julien Grall
2018-02-21 0:52 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 16/17] xen/arm: vpsci: Introduce and use PSCI_INVALID_ADDRESS Julien Grall
2018-02-21 0:53 ` Stefano Stabellini
2018-02-15 15:02 ` [PATCH v3 17/17] xen/arm: vpsci: Rework the logic to start AArch32 vCPU in Thumb mode Julien Grall
2018-02-21 0:59 ` Stefano Stabellini
2018-02-21 16:01 ` Andre Przywara [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=f6f4bdfb-5deb-03f7-3da2-3046bb331e68@linaro.org \
--to=andre.przywara@linaro.org \
--cc=julien.grall@arm.com \
--cc=sstabellini@kernel.org \
--cc=volodymyr_babchuk@epam.com \
--cc=xen-devel@lists.xen.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).