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From: Ian Campbell <ian.campbell@citrix.com>
To: xen-devel@lists.xen.org
Cc: julien.grall@linaro.org, tim@xen.org,
	Ian Campbell <ian.campbell@citrix.com>,
	vijay.kilari@gmail.com, stefano.stabellini@eu.citrix.com
Subject: [PATCH v2 4/9] xen: arm: move setup_virt_paging to p2m.[ch] from mm.[ch]
Date: Thu, 4 Sep 2014 17:14:12 +0100	[thread overview]
Message-ID: <fbeb86230828faffbb37ed109e0d1e80c56474e8.1409847257.git.ian.campbell@citrix.com> (raw)
In-Reply-To: <4427aba8dad3155fca151a0b63bfdf78e3a91033.1409847257.git.ian.campbell@citrix.com>

This file is where most of the P2M logic lives and this function will
eventually need to poke at some internals, so move it.

This is pure code motion.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
---
v2: also move from mm.h to p2m.h
---
 xen/arch/arm/mm.c         |   18 ------------------
 xen/arch/arm/p2m.c        |   18 ++++++++++++++++++
 xen/include/asm-arm/mm.h  |    2 --
 xen/include/asm-arm/p2m.h |    3 +++
 4 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index da4522c..6d9eb67 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -410,24 +410,6 @@ void __init arch_init_memory(void)
     BUG_ON(IS_ERR(dom_cow));
 }
 
-void __cpuinit setup_virt_paging(void)
-{
-    /* Setup Stage 2 address translation */
-    /* SH0=11 (Inner-shareable)
-     * ORGN0=IRGN0=01 (Normal memory, Write-Back Write-Allocate Cacheable)
-     * SL0=01 (Level-1)
-     * ARVv7: T0SZ=(1)1000 = -8 (32-(-8) = 40 bit physical addresses)
-     * ARMv8: T0SZ=01 1000 = 24 (64-24   = 40 bit physical addresses)
-     *        PS=010 == 40 bits
-     */
-#ifdef CONFIG_ARM_32
-    WRITE_SYSREG32(0x80003558, VTCR_EL2);
-#else
-    WRITE_SYSREG32(0x80023558, VTCR_EL2);
-#endif
-    isb();
-}
-
 static inline lpae_t pte_of_xenaddr(vaddr_t va)
 {
     paddr_t ma = va + phys_offset;
diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index 62547f2..6cd13c2 100644
--- a/xen/arch/arm/p2m.c
+++ b/xen/arch/arm/p2m.c
@@ -1112,6 +1112,24 @@ err:
     return page;
 }
 
+void __cpuinit setup_virt_paging(void)
+{
+    /* Setup Stage 2 address translation */
+    /* SH0=11 (Inner-shareable)
+     * ORGN0=IRGN0=01 (Normal memory, Write-Back Write-Allocate Cacheable)
+     * SL0=01 (Level-1)
+     * ARVv7: T0SZ=(1)1000 = -8 (32-(-8) = 40 bit physical addresses)
+     * ARMv8: T0SZ=01 1000 = 24 (64-24   = 40 bit physical addresses)
+     *        PS=010 == 40 bits
+     */
+#ifdef CONFIG_ARM_32
+    WRITE_SYSREG32(0x80003558, VTCR_EL2);
+#else
+    WRITE_SYSREG32(0x80023558, VTCR_EL2);
+#endif
+    isb();
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/include/asm-arm/mm.h b/xen/include/asm-arm/mm.h
index 9fa80a4..840a805 100644
--- a/xen/include/asm-arm/mm.h
+++ b/xen/include/asm-arm/mm.h
@@ -155,8 +155,6 @@ extern void remove_early_mappings(void);
 extern int __cpuinit init_secondary_pagetables(int cpu);
 /* Switch secondary CPUS to its own pagetables and finalise MMU setup */
 extern void __cpuinit mmu_init_secondary_cpu(void);
-/* Second stage paging setup, to be called on all CPUs */
-extern void __cpuinit setup_virt_paging(void);
 /* Set up the xenheap: up to 1GB of contiguous, always-mapped memory.
  * Base must be 32MB aligned and size a multiple of 32MB. */
 extern void setup_xenheap_mappings(unsigned long base_mfn, unsigned long nr_mfns);
diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h
index 3648568..53aa0fc 100644
--- a/xen/include/asm-arm/p2m.h
+++ b/xen/include/asm-arm/p2m.h
@@ -72,6 +72,9 @@ typedef enum {
 /* Initialise vmid allocator */
 void p2m_vmid_allocator_init(void);
 
+/* Second stage paging setup, to be called on all CPUs */
+void __cpuinit setup_virt_paging(void);
+
 /* Init the datastructures for later use by the p2m code */
 int p2m_init(struct domain *d);
 
-- 
1.7.10.4

  parent reply	other threads:[~2014-09-04 16:14 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-04 16:13 [PATCH v2 0/9] xen: arm: support for > 40-bit physical addressing Ian Campbell
2014-09-04 16:14 ` [PATCH v2 1/9] xen: arm: rename p2m->first_level to p2m->root Ian Campbell
2014-09-04 16:14   ` [PATCH v2 2/9] xen: arm: Implement variable levels in dump_pt_walk Ian Campbell
2014-09-08 21:24     ` Julien Grall
2014-09-08 22:12       ` Julien Grall
2014-09-09 15:04       ` Ian Campbell
2014-09-09 15:08         ` Ian Campbell
2014-09-09 16:04         ` Andrew Cooper
2014-09-08 21:33     ` Julien Grall
2014-09-04 16:14   ` [PATCH v2 3/9] xen: arm: handle concatenated root tables " Ian Campbell
2014-09-08 21:43     ` Julien Grall
2014-09-04 16:14   ` Ian Campbell [this message]
2014-09-04 16:14   ` [PATCH v2 5/9] xen: arm: Defer setting of VTCR_EL2 until after CPUs are up Ian Campbell
2014-09-08 21:46     ` Julien Grall
2014-09-04 16:14   ` [PATCH v2 6/9] xen: arm: handle variable p2m levels in p2m_lookup Ian Campbell
2014-09-08 22:05     ` Julien Grall
2014-09-04 16:14   ` [PATCH v2 7/9] xen: arm: handle variable p2m levels in apply_p2m_changes Ian Campbell
2014-09-05 23:32     ` Arianna Avanzini
2014-09-08  8:59       ` Ian Campbell
2014-09-08 22:22     ` Julien Grall
2014-09-04 16:14   ` [PATCH v2 8/9] xen: arm: support for up to 48-bit physical addressing on arm64 Ian Campbell
2014-09-08 23:28     ` Julien Grall
2014-09-04 16:14   ` [PATCH v2 9/9] xen: arm: support for up to 48-bit IPA " Ian Campbell
2014-09-08 23:42     ` Julien Grall
2014-09-08 21:05   ` [PATCH v2 1/9] xen: arm: rename p2m->first_level to p2m->root Julien Grall

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