xen-devel.lists.xenproject.org archive mirror
 help / color / mirror / Atom feed
From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: George Dunlap <george.dunlap@eu.citrix.com>,
	Tim Deegan <tim@xen.org>, Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v2 5/9] x86/pagewalk: Helpers for reserved bit handling
Date: Fri, 24 Mar 2017 08:36:10 +0000	[thread overview]
Message-ID: <fe4319ae-c13a-4b59-3a21-a9cf5329817d@citrix.com> (raw)
In-Reply-To: <58D4DD040200007800147127@prv-mh.provo.novell.com>

On 24/03/2017 07:47, Jan Beulich wrote:
>>>> On 23.03.17 at 18:35, <andrew.cooper3@citrix.com> wrote:
>> On 23/03/17 17:12, Tim Deegan wrote:
>>> At 17:02 +0000 on 23 Mar (1490288548), Andrew Cooper wrote:
>>>> On 23/03/17 16:55, Tim Deegan wrote:
>>>>> At 16:31 +0000 on 16 Mar (1489681899), Andrew Cooper wrote:
>>>>>> Some bits are unconditionally reserved in pagetable entries, or reserved
>>>>>> because of alignment restrictions.  Other bits are reserved because of 
>> control
>>>>>> register configuration.
>>>>>>
>>>>>> Introduce helpers which take an individual vcpu and guest pagetable entry, 
>> and
>>>>>> calculates whether any reserved bits are set.
>>>>>>
>>>>>> While here, add a couple of newlines to aid readability.
>>>>>>
>>>>>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
>>>>> Reviewed-by: Tim Deegan <tim@xen.org>, although:
>>>>>
>>>>>> +/* Mask covering the reserved bits from superpage alignment. */
>>>>>> +#define SUPERPAGE_RSVD(bit)                                             \
>>>>>> +    (((1ULL << (bit)) - 1) & ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1)))
>>>>> I think this will be wrong if we ever get l4 superpages, as the mask
>>>>> is only 32 bits wide.
>>>> What is 32 bits wide?  1ULL should cause everything else to be suitably
>>>> promoted, no?
>>> ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1)) == 0xffffe000.  Promotion comes
>>> too late.
>> Oh - good point.  Best fix this right now.
>>
>> Would you prefer ~((uint64_t)_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1)) or
>> ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1) | 0ULL)
> Why not simply tag the suffix on a constant already there, i.e.
>
> ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1ULL))

Oh - good point.  I will do that.

> (And btw, we commonly use only UL these days.)

Sorry - force of habit.  (XTF, being 32bit as well, really does need ULL
over UL)

~Andrew

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel

  reply	other threads:[~2017-03-24  8:36 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-16 16:31 [PATCH v2 0/9] Fixes to pagetable handling Andrew Cooper
2017-03-16 16:31 ` [PATCH v2 1/9] x86/cpuid: Sort cpu_has_* predicates by feature number Andrew Cooper
2017-03-17 16:08   ` Jan Beulich
2017-03-16 16:31 ` [PATCH v2 2/9] x86/pagewalk: Use pointer syntax for pfec parameter Andrew Cooper
2017-03-17 16:09   ` Jan Beulich
2017-03-20 11:29   ` George Dunlap
2017-03-23 16:28   ` Tim Deegan
2017-03-16 16:31 ` [PATCH v2 3/9] x86/shadow: Drop VALID_GFN() Andrew Cooper
2017-03-23 16:30   ` Tim Deegan
2017-03-16 16:31 ` [PATCH v2 4/9] x86/pagewalk: Clean up guest_supports_* predicates Andrew Cooper
2017-03-20  8:45   ` Jan Beulich
2017-03-20 13:36     ` Andrew Cooper
2017-03-20 13:59       ` Jan Beulich
2017-03-23 17:32         ` Andrew Cooper
2017-03-24  7:19           ` Jan Beulich
2017-03-23 16:34   ` Tim Deegan
2017-03-16 16:31 ` [PATCH v2 5/9] x86/pagewalk: Helpers for reserved bit handling Andrew Cooper
2017-03-20  8:48   ` Jan Beulich
2017-03-23 16:55   ` Tim Deegan
2017-03-23 17:02     ` Andrew Cooper
2017-03-23 17:12       ` Tim Deegan
2017-03-23 17:35         ` Andrew Cooper
2017-03-24  5:45           ` Juergen Gross
2017-03-24  7:51             ` Jan Beulich
     [not found]             ` <58D4DDFF0200007800147138@suse.com>
2017-03-24  7:58               ` Juergen Gross
2017-03-24  8:25                 ` Jan Beulich
2017-03-24  9:06             ` Andrew Cooper
2017-03-24  7:47           ` Jan Beulich
2017-03-24  8:36             ` Andrew Cooper [this message]
2017-03-16 16:31 ` [PATCH v2 6/9] x86/pagewalk: Re-implement the pagetable walker Andrew Cooper
2017-03-16 16:31 ` [PATCH v2 7/9] x86/shadow: Use the pagewalk reserved bits helpers Andrew Cooper
2017-03-16 17:25   ` Andrew Cooper
2017-03-20  8:53   ` Jan Beulich
2017-03-23 16:57   ` Tim Deegan
2017-03-16 16:31 ` [PATCH v2 8/9] x86/pagewalk: Improve the logic behind setting access and dirty bits Andrew Cooper
2017-03-20  9:03   ` Jan Beulich
2017-03-23 17:09   ` Tim Deegan
2017-03-23 17:40     ` Andrew Cooper
2017-03-16 16:31 ` [PATCH v2 9/9] x86/pagewalk: non-functional cleanup Andrew Cooper
2017-03-20  9:04   ` Jan Beulich
2017-03-23 17:10   ` Tim Deegan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=fe4319ae-c13a-4b59-3a21-a9cf5329817d@citrix.com \
    --to=andrew.cooper3@citrix.com \
    --cc=JBeulich@suse.com \
    --cc=george.dunlap@eu.citrix.com \
    --cc=tim@xen.org \
    --cc=xen-devel@lists.xen.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).