* [xen-4.4-testing test] 26059: trouble: preparing/queued
@ 2014-04-28 11:52 xen.org
0 siblings, 0 replies; only message in thread
From: xen.org @ 2014-04-28 11:52 UTC (permalink / raw)
To: xen-devel; +Cc: ian.jackson
flight 26059 xen-4.4-testing running [real]
http://www.chiark.greenend.org.uk/~xensrcts/logs/26059/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf 1 hosts-allocate running [st=running!]
test-armhf-armhf-xl <none executed> queued
test-amd64-i386-xl <none executed> queued
build-armhf-pvops 1 hosts-allocate running [st=running!]
test-amd64-amd64-xl-sedf-pin <none executed> queued
test-amd64-i386-xend-winxpsp3 <none executed> queued
test-amd64-amd64-xl-sedf <none executed> queued
test-amd64-i386-xl-qemut-win7-amd64 <none executed> queued
build-amd64-oldkern 1 hosts-allocate running [st=running!]
test-amd64-i386-qemuu-rhel6hvm-amd <none executed> queued
build-i386 1 hosts-allocate running [st=running!]
test-amd64-amd64-xl-qemuu-winxpsp3 <none executed> queued
build-amd64 1 hosts-allocate running [st=running!]
build-i386-pvops 1 hosts-allocate running [st=running!]
test-amd64-i386-qemut-rhel6hvm-amd <none executed> queued
test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 <none executed> queued
test-amd64-i386-freebsd10-i386 <none executed> queued
test-amd64-i386-xl-win7-amd64 <none executed> queued
test-amd64-i386-xl-qemuu-win7-amd64 <none executed> queued
test-amd64-i386-qemuu-rhel6hvm-intel <none executed> queued
test-amd64-amd64-xl-qemuu-ovmf-amd64 <none executed> queued
test-amd64-i386-freebsd10-amd64 <none executed> queued
build-amd64-xend 1 hosts-allocate running [st=running!]
test-amd64-i386-xl-qemut-winxpsp3-vcpus1 <none executed> queued
test-amd64-amd64-pv <none executed> queued
test-amd64-i386-xl-qemuu-ovmf-amd64 <none executed> queued
test-amd64-i386-rhel6hvm-amd <none executed> queued
test-amd64-i386-xl-credit2 <none executed> queued
test-amd64-amd64-xl <none executed> queued
test-amd64-amd64-xl-win7-amd64 <none executed> queued
test-amd64-i386-pv <none executed> queued
build-i386-oldkern 1 hosts-allocate running [st=running!]
build-amd64-pvops 1 hosts-allocate running [st=running!]
test-amd64-i386-rhel6hvm-intel <none executed> queued
test-amd64-i386-xl-multivcpu <none executed> queued
test-amd64-amd64-xl-pcipt-intel <none executed> queued
test-amd64-i386-qemut-rhel6hvm-intel <none executed> queued
test-amd64-i386-xl-winxpsp3-vcpus1 <none executed> queued
test-amd64-amd64-xl-qemuu-win7-amd64 <none executed> queued
test-amd64-amd64-xl-qemut-win7-amd64 <none executed> queued
build-i386-xend 1 hosts-allocate running [st=running!]
test-amd64-i386-xend-qemut-winxpsp3 <none executed> queued
test-amd64-amd64-xl-winxpsp3 <none executed> queued
test-amd64-amd64-xl-qemut-winxpsp3 <none executed> queued
test-amd64-amd64-pair <none executed> queued
test-amd64-i386-pair <none executed> queued
version targeted for testing:
xen 139a62e98161051e7687d6c356d9a9b92a8801a3
baseline version:
xen 03eb5134056d61167e6781eecf7e570b491bda73
------------------------------------------------------------
People who touched revisions under test:
Ian Campbell <ian.campbell@citrix.com>
Jan Beulich <jbeulich@suse.com>
Julien Grall <julien.grall@linaro.org>
Tim Deegan <tim@xen.org>
------------------------------------------------------------
jobs:
build-amd64-xend preparing
build-i386-xend preparing
build-amd64 preparing
build-armhf preparing
build-i386 preparing
build-amd64-oldkern preparing
build-i386-oldkern preparing
build-amd64-pvops preparing
build-armhf-pvops preparing
build-i386-pvops preparing
test-amd64-amd64-xl queued
test-armhf-armhf-xl queued
test-amd64-i386-xl queued
test-amd64-i386-rhel6hvm-amd queued
test-amd64-i386-qemut-rhel6hvm-amd queued
test-amd64-i386-qemuu-rhel6hvm-amd queued
test-amd64-i386-freebsd10-amd64 queued
test-amd64-amd64-xl-qemuu-ovmf-amd64 queued
test-amd64-i386-xl-qemuu-ovmf-amd64 queued
test-amd64-amd64-xl-qemut-win7-amd64 queued
test-amd64-i386-xl-qemut-win7-amd64 queued
test-amd64-amd64-xl-qemuu-win7-amd64 queued
test-amd64-i386-xl-qemuu-win7-amd64 queued
test-amd64-amd64-xl-win7-amd64 queued
test-amd64-i386-xl-win7-amd64 queued
test-amd64-i386-xl-credit2 queued
test-amd64-i386-freebsd10-i386 queued
test-amd64-amd64-xl-pcipt-intel queued
test-amd64-i386-rhel6hvm-intel queued
test-amd64-i386-qemut-rhel6hvm-intel queued
test-amd64-i386-qemuu-rhel6hvm-intel queued
test-amd64-i386-xl-multivcpu queued
test-amd64-amd64-pair queued
test-amd64-i386-pair queued
test-amd64-amd64-xl-sedf-pin queued
test-amd64-amd64-pv queued
test-amd64-i386-pv queued
test-amd64-amd64-xl-sedf queued
test-amd64-i386-xl-qemut-winxpsp3-vcpus1 queued
test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 queued
test-amd64-i386-xl-winxpsp3-vcpus1 queued
test-amd64-i386-xend-qemut-winxpsp3 queued
test-amd64-amd64-xl-qemut-winxpsp3 queued
test-amd64-amd64-xl-qemuu-winxpsp3 queued
test-amd64-i386-xend-winxpsp3 queued
test-amd64-amd64-xl-winxpsp3 queued
------------------------------------------------------------
sg-report-flight on osstest.cam.xci-test.com
logs: /home/xc_osstest/logs
images: /home/xc_osstest/images
Logs, config files, etc. are available at
http://www.chiark.greenend.org.uk/~xensrcts/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
Not pushing.
------------------------------------------------------------
commit 139a62e98161051e7687d6c356d9a9b92a8801a3
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Wed Apr 23 16:32:45 2014 +0100
xen/arm: vgic: Check rank in GICD_ICFGR* emulation before locking
The function vgic_irq_rank may return NULL is the IRQ is not in range handled
by the guest. This will result to derefence a NULL pointer which will crash
Xen.
I've checked the rest of the emulation and this is only place where the lock
is taken before the rank is checked.
This is CVE-2014-2986 / XSA-94.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reported-by: Thomas Leonard <talex5@gmail.com>
Reviewed-by: Jan Beulich <JBeulich@suse.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
commit fc070bcb683e6251a4c18b144ca7d869fc2f6467
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Wed Apr 23 16:25:21 2014 +0200
xen: x86 & generic: change to __builtin_prefetch()
Quoting Andi Kleen in Linux b483570a13be from 2007:
gcc 3.2+ supports __builtin_prefetch, so it's possible to use it on all
architectures. Change the generic fallback in linux/prefetch.h to use it
instead of noping it out. gcc should do the right thing when the
architecture doesn't support prefetching
Undefine the x86-64 inline assembler version and use the fallback.
ARM wants to use the builtins.
Fix a pair of spelling errors, one of which was from Lucas De Marchi in the
Linux tree.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Cc: Keir Fraser <keir@xen.org>
Acked-by: Tim Deegan <tim@xen.org>
master commit: 630017f420f111e0c0332dbd99df30ebb8fed207
master date: 2014-04-03 17:15:41 +0100
commit cbd5a0c3fd72983fb7b4b5c689280209f8da218b
Author: Jan Beulich <jbeulich@suse.com>
Date: Wed Apr 23 16:24:02 2014 +0200
x86/mm: fix checks against max_mapped_pfn
This value is an inclusive one, i.e. this fixes an off-by-one in memory
sharing and an off-by-two in shadow code.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Tim Deegan <tim@xen.org>
master commit: 088ee1d47b65d6bb92de61b404805f4ca92e3240
master date: 2014-04-03 12:08:43 +0100
commit da8e1586278dffd8510876e6fed8d47c9eba713c
Author: Julien Grall <julien.grall@linaro.org>
Date: Tue Apr 15 14:06:42 2014 +0100
xen/arm: Don't let guess access to Debug and Performance Monitor registers
Debug and performance registers are not properly switched by Xen.
Trap them and inject an undefined instruction, except for those registers
which might be unconditionally accessed which we implement as RAZ/WI.
This is CVE-2014-2915 / XSA-93.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
commit 8f416fc2669769a72783e13072547f8b2d071065
Author: Julien Grall <julien.grall@linaro.org>
Date: Tue Apr 15 12:45:28 2014 +0100
xen/arm: Don't expose implementation defined registers (Cp15 c15) to the guest
On Cortex-A15, CP15 c15 contains registers to retrieve data from L1/L2 RAM.
Exposing this registers to guest may result to leak data from Xen and/or
another guest.
By default trap every registers and inject an undefined instruction.
This is CVE-2014-2915 / XSA-93.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
commit 4642a2146e3d309266f537e7bbf55f5d85249229
Author: Julien Grall <julien.grall@linaro.org>
Date: Mon Apr 14 20:00:14 2014 +0100
xen/arm: Trap cache and TCM lockdown registers
Some cp15 c9/c10/c11 encodings are used for:
- cache control
- TCM control
- branch predictor control
All of them are implementation defined. For now inject an undefined exception
if the guest wants try to access it.
This is CVE-2014-2915 / XSA-93.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
commit 16ef39e797b0ef82449321ff5af7590e17b1b670
Author: Julien Grall <julien.grall@linaro.org>
Date: Mon Apr 14 20:46:43 2014 +0100
xen/arm: Upgrade DCISW into DCCISW
A guest is allowed to use invalidate cache by set/way instruction (i.e DCISW)
without any restriction. As the cache is shared with Xen, the guest invalidate
an address being in used by Xen. This may lead a Xen crash because the memory
state is invalid.
Set the bit HCR.SWIO to upgrade invalidate cache by set/way instruction to an
invalidate and clean.
This is CVE-2014-2915 / XSA-93.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reported-by: Thomas Leonard <tal36@cam.ac.uk>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
commit 9800bfa275b654b20522c1c8e78eba12d4b21e2f
Author: Julien Grall <julien.grall@linaro.org>
Date: Mon Apr 14 20:37:16 2014 +0100
xen/arm: Don't let the guest access the coprocessors registers
In Xen we only handle save/restore for coprocessor 10 and 11 (NEON). Other
coprocessors (0-9, 12-13) are currently exposed to the guest and may lead
to data shared between guest.
Disable access to all coprocessor except 10 and 11 by setting correctly
HCTPR.
This is CVE-2014-2915 / XSA-93.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
commit ed13367f161c8e0716f75773c7915df1d0388263
Author: Julien Grall <julien.grall@linaro.org>
Date: Mon Apr 14 19:01:20 2014 +0100
xen/arm: Inject an undefined instruction when the coproc/sysreg is not handled
Currently Xen panics if it's unable to handle a coprocessor/sysreg instruction.
Replace this behavior by inject an undefined instruction to the faulty guest
and log if Xen is in debug mode.
This is CVE-2014-2915 / XSA-93.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
(qemu changes not included)
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