[ovmf baseline-only test] 71124: all pass

[ovmf baseline-only test] 71124: all pass

[Platform Team regression test user]

This run is configured for baseline tests only.

flight 71124 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71124/

Perfect :-)
All tests in this flight passed as required
version targeted for testing:
 ovmf                 d3017dd96bf96521cbb87a26bb9dd09f8aa5811d
baseline version:
 ovmf                 6e7ec25aaaf0dfc2b4c84ffd4c7ee7cd442aecb6

Last test of basis    71120  2017-03-29 21:52:07 Z    0 days
Testing same since    71124  2017-03-30 08:50:06 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Jiaxin Wu <jiaxin.wu@intel.com>
  Wu Jiaxin <jiaxin.wu@intel.com>

jobs:
 build-amd64-xsm                                              pass    
 build-i386-xsm                                               pass    
 build-amd64                                                  pass    
 build-i386                                                   pass    
 build-amd64-libvirt                                          pass    
 build-i386-libvirt                                           pass    
 build-amd64-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         pass    
 test-amd64-i386-xl-qemuu-ovmf-amd64                          pass    


------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images

Logs, config files, etc. are available at
    http://osstest.xs.citrite.net/~osstest/testlogs/logs

Test harness code can be found at
    http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary


Push not applicable.

------------------------------------------------------------
commit d3017dd96bf96521cbb87a26bb9dd09f8aa5811d
Author: Jiaxin Wu <jiaxin.wu@intel.com>
Date:   Mon Mar 27 14:45:50 2017 +0800

    MdeModulePkg/DxeHttpLib: Fix the incorrect return status if URI port is invalid
    
    Cc: Zhang Lubo <lubo.zhang@intel.com>
    Cc: Ye Ting <ting.ye@intel.com>
    Cc: Fu Siyuan <siyuan.fu@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
    Reviewed-by: Zhang Lubo <lubo.zhang@intel.com>

commit 7571a1c191e19b48d33a33c8b7763b49999700ee
Author: Jiaxin Wu <jiaxin.wu@intel.com>
Date:   Fri Mar 24 09:53:50 2017 +0800

    MdePkg/UefiDevicePathLib: Refine the DevPathFromTextiSCSI protocol parsing
    
    For current iSCSI protocol parsing, UINT16 truncation may be happened. Since
    the Spec already have declaimed that 0 is TCP Protocol and 1+ is reserved, the
    parsing can be refined as below:
    
      if (StrCmp (ProtocolStr, L"TCP") == 0) {
        ISCSIDevPath->NetworkProtocol = 0;
      } else {
        //
        // Undefined and reserved.
        //
        ISCSIDevPath->NetworkProtocol = 1;
      }
    
    Cc: Warner Losh <imp@bsdimp.com>
    Cc: Ye Ting <ting.ye@intel.com>
    Cc: Fu Siyuan <siyuan.fu@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
    Reviewed-by: Warner Losh <imp@bsdimp.com>

commit eed4585ba5915733a88fbb69d565c5e3247753f2
Author: Jiaxin Wu <jiaxin.wu@intel.com>
Date:   Thu Mar 23 11:35:14 2017 +0800

    NetworkPkg/DnsDxe: Fix zero StationIp configuration failure of DNSv6
    
    According UEFI Spec, set to zero StationIp means to let the underlying
    IPv6 driver choose a source address. But currently, DNSv6 always return
    EFI_NO_MAPPING. The issue is caused by below bugs in DnsDxe:
    * Incorrect TPL(TPL_CALLBACK) usage during UDP configuration.
    * Failed to create the timer used to get IPv6 mapping
    * Doesn't check the Ip6Mode.IsStarted flag.
    
    Cc: Zhang Lubo <lubo.zhang@intel.com>
    Cc: Ye Ting <ting.ye@intel.com>
    Cc: Fu Siyuan <siyuan.fu@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
    Reviewed-by: Zhang Lubo <lubo.zhang@intel.com>

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