* [ovmf baseline-only test] 71685: all pass
@ 2017-07-12 14:08 Platform Team regression test user
0 siblings, 0 replies; only message in thread
From: Platform Team regression test user @ 2017-07-12 14:08 UTC (permalink / raw)
To: xen-devel, osstest-admin
This run is configured for baseline tests only.
flight 71685 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71685/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf b1fe2029fa2f473922fb830a2e33c5ae0c0ae20d
baseline version:
ovmf e508e069a809ba895230ef6ea5c8d43c471d0de4
Last test of basis 71682 2017-07-12 03:20:15 Z 0 days
Testing same since 71685 2017-07-12 07:19:30 Z 0 days 1 attempts
------------------------------------------------------------
People who touched revisions under test:
Eric Dong <eric.dong@intel.com>
jobs:
build-amd64-xsm pass
build-i386-xsm pass
build-amd64 pass
build-i386 pass
build-amd64-libvirt pass
build-i386-libvirt pass
build-amd64-pvops pass
build-i386-pvops pass
test-amd64-amd64-xl-qemuu-ovmf-amd64 pass
test-amd64-i386-xl-qemuu-ovmf-amd64 pass
------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images
Logs, config files, etc. are available at
http://osstest.xs.citrite.net/~osstest/testlogs/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
Push not applicable.
------------------------------------------------------------
commit b1fe2029fa2f473922fb830a2e33c5ae0c0ae20d
Author: Eric Dong <eric.dong@intel.com>
Date: Tue Jul 11 10:07:36 2017 +0800
UefiCpuPkg CpuCommonFeaturesLib: Fix smx/vmx enable logic error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed: Jeff Fan <jeff.fan@intel.com>
commit 05973f9e8aa6f50ff177610bc791a16540963a9a
Author: Eric Dong <eric.dong@intel.com>
Date: Tue Jul 11 10:06:56 2017 +0800
UefiCpuPkg RegisterCpuFeaturesLib: Add error handling code.
Add error handling code when initialize the CPU feature failed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
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