[ovmf baseline-only test] 71692: all pass

[ovmf baseline-only test] 71692: all pass

[Platform Team regression test user]

This run is configured for baseline tests only.

flight 71692 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/71692/

Perfect :-)
All tests in this flight passed as required
version targeted for testing:
 ovmf                 0df6c8c157af9510e21bff7bb8aa1f461d04707b
baseline version:
 ovmf                 b926f2f2a4cd404df1d2c1dddbcd1178acc63b5e

Last test of basis    71689  2017-07-14 03:51:09 Z    0 days
Testing same since    71692  2017-07-14 22:51:24 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Ard Biesheuvel <ard.biesheuvel@linaro.org>

jobs:
 build-amd64-xsm                                              pass    
 build-i386-xsm                                               pass    
 build-amd64                                                  pass    
 build-i386                                                   pass    
 build-amd64-libvirt                                          pass    
 build-i386-libvirt                                           pass    
 build-amd64-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         pass    
 test-amd64-i386-xl-qemuu-ovmf-amd64                          pass    


------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images

Logs, config files, etc. are available at
    http://osstest.xs.citrite.net/~osstest/testlogs/logs

Test harness code can be found at
    http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary


Push not applicable.

------------------------------------------------------------
commit 0df6c8c157af9510e21bff7bb8aa1f461d04707b
Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date:   Thu Jul 13 13:44:27 2017 +0100

    BaseTools/tools_def AARCH64: avoid SIMD registers in XIP code
    
    XIP code may execute with the MMU off, in which case all memory accesses
    should be strictly aligned to their size. Some versions of GCC violate
    this restriction even when -mstrict-align is passed, when performing
    loads and stores that involve SIMD registers. This is clearly a bug in
    the compiler, but we can easily work around it by avoiding SIMD registers
    altogether when building code that may execute in such a context. So add
    -mgeneral-regs-only to the AARCH64 XIP CC flags.
    
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
    Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

commit 6d73863b5464f382af2a17b2c2ec1abc550d0af5
Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date:   Thu Jul 13 13:41:12 2017 +0100

    BaseTools/tools_def AARCH64: mark register x18 as reserved
    
    The AArch64 ABI classifies register x18 as a platform register, which
    means it should not be used unless the code is guaranteed to run on a
    platform that doesn't use it in such a capacity.
    
    GCC does not honour this requirement by default, and so we need to tell
    it not to touch it explicitly, by passing the -ffixed-x18 command line
    option.
    
    Link: https://bugzilla.tianocore.org/show_bug.cgi?id=625
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
    Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

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