From: Platform Team regression test user <citrix-osstest@xenproject.org>
To: xen-devel@lists.xensource.com, osstest-admin@xenproject.org
Subject: [ovmf baseline-only test] 72033: all pass
Date: Mon, 28 Aug 2017 15:57:11 +0100 [thread overview]
Message-ID: <osstest-72033-mainreport@xen.org> (raw)
This run is configured for baseline tests only.
flight 72033 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/72033/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf ef5e0db22cdd73e9727afcaa5c7fe8e55b7b3671
baseline version:
ovmf 714c2603018a99a514c42c2b511c821f30ba9cdf
Last test of basis 72032 2017-08-28 06:47:48 Z 0 days
Testing same since 72033 2017-08-28 13:16:57 Z 0 days 1 attempts
------------------------------------------------------------
People who touched revisions under test:
Bi, Dandan <dandan.bi@intel.com>
Dandan Bi <dandan.bi@intel.com>
Eric Dong <eric.dong@intel.com>
jobs:
build-amd64-xsm pass
build-i386-xsm pass
build-amd64 pass
build-i386 pass
build-amd64-libvirt pass
build-i386-libvirt pass
build-amd64-pvops pass
build-i386-pvops pass
test-amd64-amd64-xl-qemuu-ovmf-amd64 pass
test-amd64-i386-xl-qemuu-ovmf-amd64 pass
------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images
Logs, config files, etc. are available at
http://osstest.xs.citrite.net/~osstest/testlogs/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
Push not applicable.
------------------------------------------------------------
commit ef5e0db22cdd73e9727afcaa5c7fe8e55b7b3671
Author: Bi, Dandan <dandan.bi@intel.com>
Date: Fri Aug 25 10:58:36 2017 +0800
IntelFrameworkModulePkg/LegacyBootMaintUiLib: Add NULL pointer check
mLegacyBootOptionPrivate pointer is initialized in Constructor function
with if condition check, but it's used in Destructor function directly
without any check. Now add the NULL pointer check.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
commit 34b6a0e22210b825ca5ea8447ac8bc513c0c96c5
Author: Eric Dong <eric.dong@intel.com>
Date: Wed Aug 23 10:28:55 2017 +0800
UefiCpuPkg: Update default for PcdCpuProcTraceMemSize/PcdCpuProcTraceOutputScheme.
These two definitions have redundant definition which can be handle by code.
This patch update them to follow new code definitions.
V2: Add more comments for the PCDs and keep consistent in .dec and .uni files.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
commit 330021fa41e41ef4b4aafc20e853d91179fd1b80
Author: Eric Dong <eric.dong@intel.com>
Date: Wed Aug 23 10:24:58 2017 +0800
UefiCpuPkg/CpuCommonFeaturesLib: Remove redundant definition.
The EnumProcTraceMemDisable/OutputSchemeInvalid are redundant
definitions. These definitions can be handled by other code,
so remove them.
V2: Change enum members name.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
commit b2b0ffc9b7720bf97b8f9390f77e7399e4e96596
Author: Eric Dong <eric.dong@intel.com>
Date: Fri Aug 18 11:19:03 2017 +0800
UefiCpuPkg/CpuCommonFeaturesLib: Use MSR data structure when change MSR value.
When update MSR values, current code use BITxx to modify it. Enhance the code
to use corresponding MSR's data structures to make it more user friendly.
V2: Move architecturalMsr.h file. definition to architecturalMsr.h file.
Use structure members to do value assignment.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
commit a2e24a2a012349f9233f0eb83ad71006e1c4989e
Author: Eric Dong <eric.dong@intel.com>
Date: Fri Aug 18 11:17:23 2017 +0800
UefiCpuPkg/ArchitecturalMsr.h: Add RTIT TOPA table entry definition.
Add RTIT TOPA table entry definition to architecturalMsr.h file.
V2: Add RTIT_TOPA_MEMORY_SIZE definition to architecturalMsr.h file.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
commit 48cfb7c0f4a8ed01ce4883029724d4eb2724b48a
Author: Eric Dong <eric.dong@intel.com>
Date: Mon Aug 21 14:40:44 2017 +0800
UefiCpuPkg/MpLib: fix potential overflow issue.
Current calculate timeout logic may have overflow if the input
timeout value too large. This patch fix this potential overflow
issue.
V2: Use local variable instead of call GetPerformanceCounterProperties
twice. Also correct some comments.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
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