* [ovmf baseline-only test] 74752: all pass
@ 2018-05-28 13:55 Platform Team regression test user
0 siblings, 0 replies; only message in thread
From: Platform Team regression test user @ 2018-05-28 13:55 UTC (permalink / raw)
To: xen-devel, osstest-admin
This run is configured for baseline tests only.
flight 74752 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/74752/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf 03ac238b1fe40cfbb1424bf72e2ac8276345e03c
baseline version:
ovmf 7dc7c7435e9030ad07ad7bc7d136a3997bd0b182
Last test of basis 74748 2018-05-26 04:52:45 Z 2 days
Testing same since 74752 2018-05-27 06:20:53 Z 1 days 1 attempts
------------------------------------------------------------
People who touched revisions under test:
Ruiyu Ni <ruiyu.ni@intel.com>
jobs:
build-amd64-xsm pass
build-i386-xsm pass
build-amd64 pass
build-i386 pass
build-amd64-libvirt pass
build-i386-libvirt pass
build-amd64-pvops pass
build-i386-pvops pass
test-amd64-amd64-xl-qemuu-ovmf-amd64 pass
test-amd64-i386-xl-qemuu-ovmf-amd64 pass
------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images
Logs, config files, etc. are available at
http://osstest.xs.citrite.net/~osstest/testlogs/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
Push not applicable.
------------------------------------------------------------
commit 03ac238b1fe40cfbb1424bf72e2ac8276345e03c
Author: Ruiyu Ni <ruiyu.ni@intel.com>
Date: Wed May 23 11:28:46 2018 +0800
MdeModulePkg/PciBus: Use actual max bus # for subordinary bus #
Current code assumes the max bus(0xFF) is under this P2P bridge and
temporarily set it as subordinate bus.
It may cause silicon hangs during PCI enumeration in some specific
case.
Instead, it should get the max bus number from the bus number
resources returned from
PCI_HOST_BRIDGE_RESOURCE_ALLOCATION.StartBusEnumeration() and set it
as subordinate bus.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
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