* [ovmf baseline-only test] 74956: all pass
@ 2018-07-11 19:59 Platform Team regression test user
0 siblings, 0 replies; only message in thread
From: Platform Team regression test user @ 2018-07-11 19:59 UTC (permalink / raw)
To: xen-devel, osstest-admin
This run is configured for baseline tests only.
flight 74956 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/74956/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf c6a14de3ef30291918f3b15436cf6a75db413eea
baseline version:
ovmf 99fd30431d565412707f7a1e1a23461d10d07e85
Last test of basis 74954 2018-07-11 09:49:41 Z 0 days
Testing same since 74956 2018-07-11 11:56:44 Z 0 days 1 attempts
------------------------------------------------------------
People who touched revisions under test:
Zenith432 <zenith432@users.sourceforge.net>
jobs:
build-amd64-xsm pass
build-i386-xsm pass
build-amd64 pass
build-i386 pass
build-amd64-libvirt pass
build-i386-libvirt pass
build-amd64-pvops pass
build-i386-pvops pass
test-amd64-amd64-xl-qemuu-ovmf-amd64 pass
test-amd64-i386-xl-qemuu-ovmf-amd64 pass
------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images
Logs, config files, etc. are available at
http://osstest.xs.citrite.net/~osstest/testlogs/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
Push not applicable.
------------------------------------------------------------
commit c6a14de3ef30291918f3b15436cf6a75db413eea
Author: Zenith432 <zenith432@users.sourceforge.net>
Date: Tue Jul 10 16:50:36 2018 +0800
BaseTools/GenFw: Disable support for R_X86_64_32S
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=999
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zenith432 <zenith432@users.sourceforge.net>
Reviewed-by: Liming Gao <liming.gao@intel.com>
commit ecbaa856da0c94b7054f795d001ee3f5aaee033e
Author: Zenith432 <zenith432@users.sourceforge.net>
Date: Mon Jul 9 20:58:15 2018 +0800
BaseTools/GenFw: Add X64 GOTPCREL Support to GenFw
Adds support for the following X64 ELF relocations to GenFw
R_X86_64_GOTPCREL
R_X86_64_GOTPCRELX
R_X86_64_REX_GOTPCRELX
Background:
The GCC49 and GCC5 toolchains use the small pie model for X64. In the
small pie model, gcc emits a GOTPCREL relocation whenever C code takes
the address of a global function. The emission of GOTPCREL is mitigated
by several factors
1. In GCC49, all global symbols are declared hidden thereby eliminating
the emission of GOTPCREL.
2. In GCC5, LTO is used. In LTO, the complier first creates intermediate
representation (IR) files. During the static link stage, the LTO compiler
combines all IR files as a single compilation unit, using linker symbol
assistance to generate code. Any global symbols defined in the IR that
are not referenced from outside the IR are converted to local symbols -
thereby eliminating the emission of GOTPCREL for them.
3. The linker (binutils ld) further transforms any GOTPCREL used with
the movq opcode to a direct rip-relative relocation used with the leaq
opcode. This linker optimization can be disabled with the option
-Wl,--no-relax. Furthermore, gcc is able to emit GOTPCREL with other
opcodes
- pushq opcode for passing arguments to functions.
- addq/subq opcodes for pointer arithmetic.
These other opcode uses are not transformed by the linker.
Ultimately, in GCC5 there are some emissions of GOTPCREL that survive
all these mitigations - if C code takes the address of a global function
defined in assembly code - and performs pointer arithmetic on the
address - then the GOTPCREL remains in the final linker product.
A GOTPCREL relocation today causes the build to stop since GenFw does
not handle them. It is possible to eliminate any remaining GOTPCREL
emissions by manually declaring the global symbols causing them to have
hidden visibility. This patch is offered instead to allow GenFw to
handle any residual GOTPCREL.
Cc: Shi Steven <steven.shi@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zenith432 <zenith432@users.sourceforge.net>
Reviewed-by: Liming Gao <liming.gao@intel.com>
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