* [ovmf baseline-only test] 83894: trouble: blocked/broken
@ 2019-04-07 3:16 Platform Team regression test user
2019-04-07 3:16 ` [Xen-devel] " Platform Team regression test user
0 siblings, 1 reply; 2+ messages in thread
From: Platform Team regression test user @ 2019-04-07 3:16 UTC (permalink / raw)
To: xen-devel, osstest-admin
This run is configured for baseline tests only.
flight 83894 ovmf real [real]
http://osstest.xensource.com/osstest/logs/83894/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-amd64-xsm <job status> broken
build-i386 <job status> broken
build-amd64-pvops <job status> broken
build-i386-xsm <job status> broken
build-amd64 <job status> broken
build-i386-pvops <job status> broken
Tests which did not succeed, but are not blocking:
test-amd64-amd64-xl-qemuu-ovmf-amd64 1 build-check(1) blocked n/a
build-amd64-libvirt 1 build-check(1) blocked n/a
test-amd64-i386-xl-qemuu-ovmf-amd64 1 build-check(1) blocked n/a
build-i386-libvirt 1 build-check(1) blocked n/a
build-i386-pvops 4 host-install(4) broken baseline untested
build-i386 4 host-install(4) broken baseline untested
build-amd64 4 host-install(4) broken baseline untested
build-amd64-pvops 4 host-install(4) broken baseline untested
build-i386-xsm 4 host-install(4) broken baseline untested
build-amd64-xsm 4 host-install(4) broken baseline untested
version targeted for testing:
ovmf 079141ebe7f1bf5f85a0c7f1c43f77c44844b1bd
baseline version:
ovmf 7ed72121b753a7493a8c5bf3711b5efbc5e80491
Last test of basis 83876 2019-04-05 08:53:59 Z 1 days
Testing same since 83894 2019-04-07 01:54:27 Z 0 days 1 attempts
------------------------------------------------------------
People who touched revisions under test:
Eric Dong <eric.dong@intel.com>
Ray Ni <ray.ni@intel.com>
Vanguput Narendra K <narendra.k.vanguput@intel.com>
Vanguput, Narendra K <narendra.k.vanguput@intel.com>
jobs:
build-amd64-xsm broken
build-i386-xsm broken
build-amd64 broken
build-i386 broken
build-amd64-libvirt blocked
build-i386-libvirt blocked
build-amd64-pvops broken
build-i386-pvops broken
test-amd64-amd64-xl-qemuu-ovmf-amd64 blocked
test-amd64-i386-xl-qemuu-ovmf-amd64 blocked
------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images
Logs, config files, etc. are available at
http://osstest.xensource.com/osstest/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
broken-job build-amd64-xsm broken
broken-job build-i386 broken
broken-job build-amd64-pvops broken
broken-job build-i386-xsm broken
broken-job build-amd64 broken
broken-job build-i386-pvops broken
broken-step build-i386-pvops host-install(4)
broken-step build-i386 host-install(4)
broken-step build-amd64 host-install(4)
broken-step build-amd64-pvops host-install(4)
broken-step build-i386-xsm host-install(4)
broken-step build-amd64-xsm host-install(4)
Push not applicable.
------------------------------------------------------------
commit 079141ebe7f1bf5f85a0c7f1c43f77c44844b1bd
Author: Ray Ni <ray.ni@intel.com>
Date: Fri Mar 29 16:40:09 2019 +0800
UefiCpuPkg/Cpuid: Dump leaf 1FH information correctly
Leaf 1FH is very similar to leaf 0BH. Both return the CPU topology
information.
Leaf 0BH returns 3-level (Package/Core/Thread) CPU topology info.
Leaf 1FH returns 6-level (Package/Die/Tile/Module/Core/Thread) CPU
topology info.
The logic to enumerate the topology info is the same.
But today's logic to handle 1FH is completely wrong.
The patch combines them together to fix the 1FH issue.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhiqiang Qin <zhiqiang.qin@intel.com>
commit 516e33972f0a55045dc1ca44ae682bbc9b921580
Author: Ray Ni <ray.ni@intel.com>
Date: Thu Apr 4 13:34:21 2019 +0800
UefiCpuPkg/Cpuid.h: Remove duplicated struct definition for leaf 1FH
Per SDM CPUID.0BH and CPUID.1FH outputs the same format of data in
EAX/EBX/ECX/EDX except CPUID.1FH reports more level types such as
module, tile, die.
The patch removes the unnecessary duplicated structure definitions
for CPUID.1FH because when the structure definitions for CPUID.0BH
can be used for CPUID.1FH.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhiqiang Qin <zhiqiang.qin@intel.com>
commit f664032e063bda6f477fd0f8a8cccf1371710b9e
Author: Eric Dong <eric.dong@intel.com>
Date: Thu Feb 14 09:08:13 2019 +0800
UefiCpuPkg/RegisterCpuFeaturesLib: Correct comments.
Cc: Ray Ni <Ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
commit 001c2c80333f41cfcd3e7de6f39a5301cefaf472
Author: Eric Dong <eric.dong@intel.com>
Date: Wed Feb 13 08:16:32 2019 +0800
UefiCpuPkg/RegisterCpuFeaturesLib: Simplify PcdCpuFeaturesSupport.
PcdCpuFeaturesSupport used to specify the platform policy about
what CPU features this platform supports. This PCD will be used
in IsCpuFeatureSupported only.
Now RegisterCpuFeaturesLib use this PCD as an template to Get the
pcd size. Update the code logic to replace it with
PcdCpuFeaturesSetting.
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1375
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
commit 6214ffb41079525875af3adc7f437a0fe8dbd09d
Author: Eric Dong <eric.dong@intel.com>
Date: Tue Feb 12 15:22:48 2019 +0800
UefiCpuPkg/RegisterCpuFeaturesLib: Optimize PCD
PcdCpuFeaturesUserConfiguration.
Merge PcdCpuFeaturesUserConfiguration into PcdCpuFeaturesSetting.
Use PcdCpuFeaturesSetting as input for the user input feature setting
Use PcdCpuFeaturesSetting as output for the final CPU feature setting
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1375
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
commit 79be3d27517c525e26351b0057f22de811592917
Author: Eric Dong <eric.dong@intel.com>
Date: Tue Feb 12 14:48:08 2019 +0800
UefiCpuPkg/RegisterCpuFeaturesLib: Remove useless functions.
Remove useless APIs, simplify the code logic.
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1375
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
commit 37f9fea5b88d2aa0cc702e1b315a1b939447eb01
Author: Vanguput, Narendra K <narendra.k.vanguput@intel.com>
Date: Mon Apr 1 16:16:01 2019 +0800
UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593
For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.
Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.
Patch6 - Removed Global Cr2 instead used function parameter.
Patch7 - Removed checking Cr2 with 0 as per feedback.
Patch8 and 9 - Aligned with EDK2 Coding style.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K <narendra.k.vanguput@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
commit e4ff6349bf9ee4f3f392141374901ea4994e043e
Author: Eric Dong <eric.dong@intel.com>
Date: Wed Apr 3 10:46:20 2019 +0800
UefiCpuPkg/MpInitLib: Fix MemTest86 failure.
V2 changes:
Update the commit message and comments in the code.
When waking vector buffer allocated by CpuDxe is tested by MemTest86
in MP mode, an error is reported because the same range of memory is
modified by both CpuDxe driver and MemTest86.
The waking vector buffer is not expected to be tested by MemTest86 if
it is allocated out because MemTest86 only tests free memory. But
current CpuDxe driver "borrows" buffer instead of allocate buffer for
waking vector buffer (through allocate & free to get the buffer
pointer, backup the buffer data before using it and restore it after
using). With this implementation, if the buffer borrowed is not used
by any other drivers, MemTest86 tool will treat it as free memory
and test it.
In order to fix the above issue, CpuDxe changes to allocate the
buffer below 1M instead of borrowing it. But directly allocating
memory below 1MB causes LegacyBios driver fails to start. LegacyBios
driver allocates memory range from
"0xA0000 - PcdEbdaReservedMemorySize" to 0xA0000 as Ebda Reserved
Memory. The minimum value for "0xA0000 - PcdEbdaReservedMemorySize"
is 0x88000. If LegacyBios driver allocate this range failed, it
asserts.
LegacyBios also reserves range from 0x60000 to
"0x60000 + PcdOpromReservedMemorySize", it will be used as Oprom
Reserve Memory. The maximum value for "0x60000 +
PcdOpromReservedMemorySize" is 0x88000. LegacyBios driver tries to
allocate these range page(4K size) by page. It just reports warning
message if some pages are already allocated by others.
Base on above investigation, one page in range 0x60000 ~ 0x88000 can
be used as the waking vector buffer.
LegacyBios driver only reports warning when page allocation in range
[0x60000, 0x88000) fails. This library is consumed by CpuDxe driver
to produce CPU Arch protocol. LagacyBios driver depends on CPU Arch
protocol which guarantees below allocation runs earlier than
LegacyBios driver.
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 2+ messages in thread
* [Xen-devel] [ovmf baseline-only test] 83894: trouble: blocked/broken
2019-04-07 3:16 [ovmf baseline-only test] 83894: trouble: blocked/broken Platform Team regression test user
@ 2019-04-07 3:16 ` Platform Team regression test user
0 siblings, 0 replies; 2+ messages in thread
From: Platform Team regression test user @ 2019-04-07 3:16 UTC (permalink / raw)
To: xen-devel, osstest-admin
This run is configured for baseline tests only.
flight 83894 ovmf real [real]
http://osstest.xensource.com/osstest/logs/83894/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-amd64-xsm <job status> broken
build-i386 <job status> broken
build-amd64-pvops <job status> broken
build-i386-xsm <job status> broken
build-amd64 <job status> broken
build-i386-pvops <job status> broken
Tests which did not succeed, but are not blocking:
test-amd64-amd64-xl-qemuu-ovmf-amd64 1 build-check(1) blocked n/a
build-amd64-libvirt 1 build-check(1) blocked n/a
test-amd64-i386-xl-qemuu-ovmf-amd64 1 build-check(1) blocked n/a
build-i386-libvirt 1 build-check(1) blocked n/a
build-i386-pvops 4 host-install(4) broken baseline untested
build-i386 4 host-install(4) broken baseline untested
build-amd64 4 host-install(4) broken baseline untested
build-amd64-pvops 4 host-install(4) broken baseline untested
build-i386-xsm 4 host-install(4) broken baseline untested
build-amd64-xsm 4 host-install(4) broken baseline untested
version targeted for testing:
ovmf 079141ebe7f1bf5f85a0c7f1c43f77c44844b1bd
baseline version:
ovmf 7ed72121b753a7493a8c5bf3711b5efbc5e80491
Last test of basis 83876 2019-04-05 08:53:59 Z 1 days
Testing same since 83894 2019-04-07 01:54:27 Z 0 days 1 attempts
------------------------------------------------------------
People who touched revisions under test:
Eric Dong <eric.dong@intel.com>
Ray Ni <ray.ni@intel.com>
Vanguput Narendra K <narendra.k.vanguput@intel.com>
Vanguput, Narendra K <narendra.k.vanguput@intel.com>
jobs:
build-amd64-xsm broken
build-i386-xsm broken
build-amd64 broken
build-i386 broken
build-amd64-libvirt blocked
build-i386-libvirt blocked
build-amd64-pvops broken
build-i386-pvops broken
test-amd64-amd64-xl-qemuu-ovmf-amd64 blocked
test-amd64-i386-xl-qemuu-ovmf-amd64 blocked
------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images
Logs, config files, etc. are available at
http://osstest.xensource.com/osstest/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
broken-job build-amd64-xsm broken
broken-job build-i386 broken
broken-job build-amd64-pvops broken
broken-job build-i386-xsm broken
broken-job build-amd64 broken
broken-job build-i386-pvops broken
broken-step build-i386-pvops host-install(4)
broken-step build-i386 host-install(4)
broken-step build-amd64 host-install(4)
broken-step build-amd64-pvops host-install(4)
broken-step build-i386-xsm host-install(4)
broken-step build-amd64-xsm host-install(4)
Push not applicable.
------------------------------------------------------------
commit 079141ebe7f1bf5f85a0c7f1c43f77c44844b1bd
Author: Ray Ni <ray.ni@intel.com>
Date: Fri Mar 29 16:40:09 2019 +0800
UefiCpuPkg/Cpuid: Dump leaf 1FH information correctly
Leaf 1FH is very similar to leaf 0BH. Both return the CPU topology
information.
Leaf 0BH returns 3-level (Package/Core/Thread) CPU topology info.
Leaf 1FH returns 6-level (Package/Die/Tile/Module/Core/Thread) CPU
topology info.
The logic to enumerate the topology info is the same.
But today's logic to handle 1FH is completely wrong.
The patch combines them together to fix the 1FH issue.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhiqiang Qin <zhiqiang.qin@intel.com>
commit 516e33972f0a55045dc1ca44ae682bbc9b921580
Author: Ray Ni <ray.ni@intel.com>
Date: Thu Apr 4 13:34:21 2019 +0800
UefiCpuPkg/Cpuid.h: Remove duplicated struct definition for leaf 1FH
Per SDM CPUID.0BH and CPUID.1FH outputs the same format of data in
EAX/EBX/ECX/EDX except CPUID.1FH reports more level types such as
module, tile, die.
The patch removes the unnecessary duplicated structure definitions
for CPUID.1FH because when the structure definitions for CPUID.0BH
can be used for CPUID.1FH.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhiqiang Qin <zhiqiang.qin@intel.com>
commit f664032e063bda6f477fd0f8a8cccf1371710b9e
Author: Eric Dong <eric.dong@intel.com>
Date: Thu Feb 14 09:08:13 2019 +0800
UefiCpuPkg/RegisterCpuFeaturesLib: Correct comments.
Cc: Ray Ni <Ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
commit 001c2c80333f41cfcd3e7de6f39a5301cefaf472
Author: Eric Dong <eric.dong@intel.com>
Date: Wed Feb 13 08:16:32 2019 +0800
UefiCpuPkg/RegisterCpuFeaturesLib: Simplify PcdCpuFeaturesSupport.
PcdCpuFeaturesSupport used to specify the platform policy about
what CPU features this platform supports. This PCD will be used
in IsCpuFeatureSupported only.
Now RegisterCpuFeaturesLib use this PCD as an template to Get the
pcd size. Update the code logic to replace it with
PcdCpuFeaturesSetting.
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1375
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
commit 6214ffb41079525875af3adc7f437a0fe8dbd09d
Author: Eric Dong <eric.dong@intel.com>
Date: Tue Feb 12 15:22:48 2019 +0800
UefiCpuPkg/RegisterCpuFeaturesLib: Optimize PCD
PcdCpuFeaturesUserConfiguration.
Merge PcdCpuFeaturesUserConfiguration into PcdCpuFeaturesSetting.
Use PcdCpuFeaturesSetting as input for the user input feature setting
Use PcdCpuFeaturesSetting as output for the final CPU feature setting
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1375
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
commit 79be3d27517c525e26351b0057f22de811592917
Author: Eric Dong <eric.dong@intel.com>
Date: Tue Feb 12 14:48:08 2019 +0800
UefiCpuPkg/RegisterCpuFeaturesLib: Remove useless functions.
Remove useless APIs, simplify the code logic.
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1375
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
commit 37f9fea5b88d2aa0cc702e1b315a1b939447eb01
Author: Vanguput, Narendra K <narendra.k.vanguput@intel.com>
Date: Mon Apr 1 16:16:01 2019 +0800
UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593
For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.
Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.
Patch6 - Removed Global Cr2 instead used function parameter.
Patch7 - Removed checking Cr2 with 0 as per feedback.
Patch8 and 9 - Aligned with EDK2 Coding style.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K <narendra.k.vanguput@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
commit e4ff6349bf9ee4f3f392141374901ea4994e043e
Author: Eric Dong <eric.dong@intel.com>
Date: Wed Apr 3 10:46:20 2019 +0800
UefiCpuPkg/MpInitLib: Fix MemTest86 failure.
V2 changes:
Update the commit message and comments in the code.
When waking vector buffer allocated by CpuDxe is tested by MemTest86
in MP mode, an error is reported because the same range of memory is
modified by both CpuDxe driver and MemTest86.
The waking vector buffer is not expected to be tested by MemTest86 if
it is allocated out because MemTest86 only tests free memory. But
current CpuDxe driver "borrows" buffer instead of allocate buffer for
waking vector buffer (through allocate & free to get the buffer
pointer, backup the buffer data before using it and restore it after
using). With this implementation, if the buffer borrowed is not used
by any other drivers, MemTest86 tool will treat it as free memory
and test it.
In order to fix the above issue, CpuDxe changes to allocate the
buffer below 1M instead of borrowing it. But directly allocating
memory below 1MB causes LegacyBios driver fails to start. LegacyBios
driver allocates memory range from
"0xA0000 - PcdEbdaReservedMemorySize" to 0xA0000 as Ebda Reserved
Memory. The minimum value for "0xA0000 - PcdEbdaReservedMemorySize"
is 0x88000. If LegacyBios driver allocate this range failed, it
asserts.
LegacyBios also reserves range from 0x60000 to
"0x60000 + PcdOpromReservedMemorySize", it will be used as Oprom
Reserve Memory. The maximum value for "0x60000 +
PcdOpromReservedMemorySize" is 0x88000. LegacyBios driver tries to
allocate these range page(4K size) by page. It just reports warning
message if some pages are already allocated by others.
Base on above investigation, one page in range 0x60000 ~ 0x88000 can
be used as the waking vector buffer.
LegacyBios driver only reports warning when page allocation in range
[0x60000, 0x88000) fails. This library is consumed by CpuDxe driver
to produce CPU Arch protocol. LagacyBios driver depends on CPU Arch
protocol which guarantees below allocation runs earlier than
LegacyBios driver.
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2019-04-07 3:17 UTC | newest]
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