From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Wang Subject: [PATCH 0 of 4] amd iommu: IOMMUv2 support Date: Fri, 18 Nov 2011 11:42:21 +0100 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: JBeulich@suse.com Cc: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org This patch set adds basic supports for amd next generation iommu (IOMMUv2) hardware. IOMMUv2 supports various new features advertised by iommu extended feature register. It introduces guest level IO translation and supports state-of-the-art ATS/ATC devices with demand paging capability. Please refer to AMD IOMMU Architectural Specification [1] for more details. Thanks, Wei [1] http://support.amd.com/us/Processor_TechDocs/48882.pdf